Abstract: A linear phase FIR filter includes a multiplication/accumulator engine which is operable to receive the multi-level data stream and multiply it by predetermined filter coefficients. The coefficients are symmetrical to allow a pre-addition operation wherein the data is first stored in a buffer and then the data for symmetrical coefficients added before multiplication by the coefficient. This results in a reduction of multiplications by a factor of two, thus allowing the multiplication/accumulator engine to operate at one-half the clock rate of the oversampled multi-level data bit stream.