Abstract: A semiconductor device includes a semiconductor layer of a first conductivity type having a first surface and a second surface, a source region disposed on the first surface, a gate region disposed on the first surface adjacent the source region, and a drain region disposed on the first surface. The semiconductor device also includes a pair of charge control trenches disposed between the gate region and the drain region. Each of the pair of charge control trenches is characterized by a width and includes a first dielectric material disposed therein and a second material disposed internal to the first dielectric material. Additionally, a concentration of doping impurities present in the semiconductor layer of the first conductivity type and a distance between the pair of charge control trenches define an electrical characteristic of the semiconductor device that is independent of the width of each of the pair of charge control trenches.

Abstract: The present inventors have realized that manufacturability plays into optimization of power semiconductor devices in some surprising new ways. If the process window is too narrow, the maximum breakdown voltage will not be achieved due to doping variations and the like normally seen in device fabrication. Thus, among other teachings, the present application describes some ways to improve the process margin, for a given breakdown voltage specification, by actually reducing the maximum breakdown voltage. In one class of embodiments, this is done by introducing a vertical gradation in the density of fixed electrostatic charge, or in the background doping of the drift region, or both. Several techniques are disclosed for achieving this.

Abstract: Power devices using refilled trenches with permanent charge at or near their sidewalls. These trenches extend vertically into a drift region.

Abstract: A lateral device includes a gate region connected to a drain region by a drift layer. An insulation region adjoins the drift layer between the gate region and the drain region. Permanent charges are embedded in the insulation region, sufficient to cause inversion in the insulation region.

Abstract: Power semiconductor devices in which insulated empty space zones are used for field-shaping regions, in place of dielectric bodies previously used. Optionally permanent charge is added at the interface between the insulated empty space zone and an adjacent semiconductor drift region.

Abstract: A vertical device structure includes a volume of semiconductor material, laterally adjoining a trench having insulating material on sidewalls thereof. A gate electrode within the trench is capacitively coupled through the insulating material to a first portion of the semiconducting material. Some portions of the insulating material contain fixed electrostatic charge in a density high enough to invert a second portion of the semiconductor material when no voltage is applied. The inverted portions can be used as induced source or drain extensions, to assure that parasitic are reduced without increasing on-resistance.

Abstract: A MOSFET switch which has a low surface electric field at an edge termination area, and also has increased breakdown voltage. The MOSFET switch has a new edge termination structure employing an N-P-N sandwich structure. The MOSFET switch also has a polysilicon field plate configuration operative to enhance any spreading of any depletion layer located at an edge of a main PN junction of the N-P-N sandwich structure.