Patents Represented by Attorney Grossman & Flight, LLC.
  • Patent number: 7100181
    Abstract: Systems and methods for determining whether a television is on and in as near proximity are provided. An example system includes a sensor, an analog-to-digital converter, and a digital signal processor. The digital signal processor processes a set of digital audio samples detected by the sensor to determine if the sensor is in near proximity to a television in an on state.
    Type: Grant
    Filed: April 19, 2002
    Date of Patent: August 29, 2006
    Assignee: Nielsen Media Research, Inc.
    Inventors: Venugopal Srinivasan, John C. Peiffer, Daniel Nelson
  • Patent number: 6889188
    Abstract: Methods and apparatus for controlling an electronic device connected to a network are provided. The methods and apparatus described herein convert a text based device list and/or a text based function list into text based voice prompt scripts. The voice prompt scripts are then read to a user via a text-to-speech engine. The user responds with a voice command for a device. The voice command is converted to text by a voice recognition engine. This text is then used to send a command to the electronic device via the network.
    Type: Grant
    Filed: November 22, 2002
    Date of Patent: May 3, 2005
    Assignee: Intel Corporation
    Inventors: Benjamin T. Metzler, Wayne D. Trantow
  • Patent number: 6864126
    Abstract: A method of manufacturing a semiconductor device with a transistor comprising an LDD region and a silicide layer is disclosed. The method may include forming a gate electrode on a substrate, forming a first preliminary source/drain region with shallow junction through an ion implantation process using the gate electrode as a mask, and forming a ILD pattern with contact holes on the substrate including the gate electrode, the contact holes exposing the top of the gate electrode and some part of the first preliminary source/drain region. The method may also include forming an expanded source/drain region through an ion implantation process using the ILD pattern as a mask, forming a silicide layer on the top of the gate electrode and the expanded source/drain region, and forming contact plugs by filling the contact holes with metal.
    Type: Grant
    Filed: December 29, 2003
    Date of Patent: March 8, 2005
    Assignee: Dongbu Electronics Co., Ltd.
    Inventor: Dae Kyeun Kim
  • Patent number: 6840174
    Abstract: A debris screen for a printing press having an ink roller train and a paper pathway includes a source reel, a collecting reel, and at least one transfer roller mounted to a supporting frame, a sheet of flexible material extending along a sheet path from the source reel, over the transfer roller, and to the collecting reel, the transfer roller positioned on the frame such that the sheet path extends between a portion of the ink roller train and the pathway for the paper web.
    Type: Grant
    Filed: January 31, 2003
    Date of Patent: January 11, 2005
    Assignee: R. R. Donnelley & Sons Company
    Inventors: Paul Harris, Eric Thompson
  • Patent number: 6834456
    Abstract: Firearms and recoil pad devices for use with firearms are disclosed. An example recoil pad device includes a pad having a working surface which increases by more than approximately 15% when moving from a first condition in which the pad is pressed against a shooter and a second condition when the firearm is fired.
    Type: Grant
    Filed: June 5, 2003
    Date of Patent: December 28, 2004
    Assignee: Heckler & Koch, GmbH
    Inventor: Johannes Murello
  • Patent number: 6834133
    Abstract: Optoelectronic packages and methods to simultaneously couple an optoelectronic chip to a waveguide and substrate using conventional flux soldering processes are disclosed. A disclosed optoelectronic package includes a substrate, a waveguide mounted on the substrate, an optoelectronic chip having electrically conductive contacts coupled to the substrate via a metallic solder and an optical element located on the optoelectronic chip and coupled to the waveguide via an optical solder which protects the optical element during a metallic soldering of the optoelectronic chip to the substrate.
    Type: Grant
    Filed: August 27, 2003
    Date of Patent: December 21, 2004
    Assignee: Intel Corporation
    Inventors: Steven Towle, Daoqiang Lu
  • Patent number: 6833539
    Abstract: An accessory utilizing a light emitter that is capable of detachably attaching a transparent body such as a gem is provided. Because the transparent body is detachable and re-attachable, it is easily possible to use a plurality of transparent bodies on one accessory. Also, it is possible to use the accessory in a wide variety of situations according to time, place and occasion. Further, providing a family crest, engraved mark, trade mark, illustration and/or the like on the accessory not only embellishes the effect of the accessory, but also makes the accessory more distinctive.
    Type: Grant
    Filed: July 8, 2003
    Date of Patent: December 21, 2004
    Inventor: Minoru Maeda
  • Patent number: 6830997
    Abstract: Semiconductor devices and methods for forming semiconductor devices are disclosed. In a disclosed method, a gate of a semiconductor device is formed by separately forming a lower gate and an upper gate electrode on a semiconductor substrate. A lower gate polysilicon layer is first formed on the semiconductor substrate and selectively removed to form the lower gate electrode. LDD regions are formed on opposite sides of the lower gate electrode. A nitride film is formed and etched to form sidewalls of the lower gate electrode. Source and drain regions are formed by implanting impurity ions into the LDD regions on the opposite sides of the lower gate electrode. An upper gate polysilicon layer is formed. Then, the upper gate polysilicon layer is selectively removed to form an upper gate electrode. A silicide layer is then formed on the top and side surfaces of the upper gate electrode.
    Type: Grant
    Filed: September 16, 2003
    Date of Patent: December 14, 2004
    Assignee: ANAM Semiconductor, Inc.
    Inventor: Kwan Ju Koh
  • Patent number: 6829858
    Abstract: Grenade launchers and methods to secure a grenade launcher to a firearm are disclosed. In an example method, if the firearm has a first fixed bearing and a first movable bearing separated by a first distance, (a) a first adapter is secured to the grenade launcher, (b) the first fixed bearing is secured to one of the grenade launcher and the first adapter, and (c) the first movable bearing is secured to the first adapter. If the second firearm has a second fixed bearing and a second movable bearing separated by a second distance, (a) a second adapter is secured to the grenade launcher, (b) the second fixed bearing is secured to one of the grenade launcher and the second adapter, and (c) the second movable bearing is secured to the second adapter.
    Type: Grant
    Filed: January 27, 2003
    Date of Patent: December 14, 2004
    Assignee: Heckler & Koch GmbH
    Inventor: Jürgen Gablowski
  • Patent number: 6825687
    Abstract: An apparatus and method for reducing leakage current of transistors used in an integrated circuit, which selectively switch a processor circuit in the integrated circuit to a standby state. A cooling device is included and selectively located in an area of the integrated circuit that is in close proximity to a transistor used to switch a processor circuit between active and standby states. The cooling device cools the transistor in order to improve both its leakage and active current states, thereby increasing efficiency of the transistor and reducing its leakage current.
    Type: Grant
    Filed: August 29, 2002
    Date of Patent: November 30, 2004
    Assignee: Intel Corporation
    Inventors: Ali Keshavarzi, Jaume A. Segura, Siva G. Narendra, Vivek K. De
  • Patent number: 6810334
    Abstract: Disclosed is a method for inspecting defects of a wafer of a semiconductor device, wherein the wafer is set up with reference coordinates for a respective die so that inspection time is reduced and the defects are classified by the respective die. The method may be carried out by a defect analysis system comprising an inspection station for inspecting defects of the wafer and a review station for precisely re-inspecting defects. The method includes the steps of: providing the respective die with a serial number, the plural dies being formed on the wafer; and setting up coordinates for a plane of the respective die based on one edge of the die as reference point.
    Type: Grant
    Filed: June 11, 2003
    Date of Patent: October 26, 2004
    Assignee: Dongbu Electronics Co., Ltd.
    Inventors: Hyun bae Lee, Jung Hwan Choi, Jeong Hun Kim
  • Patent number: 6806174
    Abstract: Semiconductor devices and methods for fabrication the same are disclosed. An illustrated method of fabricating a semiconductor device comprises: forming a trench on a substrate; forming a gate electrode by depositing and planarizing an oxide layer and polysilicon on the substrate including the trench; forming a gate oxide layer and a polysilicon layer on the substrate; forming source/drain regions by a photo process; and forming a contact plug on at least one of the source/drain regions. By controlling the overlap between the gate and the source/drain regions using a source/drain mask, current control becomes easy and a device sensitive to current control is easily fabricated. Sufficient spaces between the gate and the contact(s) due to the buried type gate make the fabrication processes easy.
    Type: Grant
    Filed: January 15, 2004
    Date of Patent: October 19, 2004
    Assignee: ANAM Semiconductor, Inc.
    Inventor: Ik Soo Do
  • Patent number: 6806150
    Abstract: According to one example method of fabricating a semiconductor memory device, an isolation layer and a capping layer are formed on a silicon substrate, sequentially. By an epitaxial silicon growth process, an epitaxial active region is formed. A gate insulation layer and a gate electrode are then formed on the epitaxial active region, sequentially. Subsequently, a bit line contact plug and a storage node contact plug are epitaxially formed on the epitaxial active region. A lower interlayer insulation layer is formed on the resultant structure and planarized. An upper interlayer insulation layer is formed on the lower interlayer insulation layer and a bit line is formed therein. An additional upper interlayer insulation layer is then formed on the entire surface of the resultant structure and a storage node electrode is formed through the additional upper and the upper interlayer insulation layer to be connected to the storage node contact.
    Type: Grant
    Filed: December 26, 2003
    Date of Patent: October 19, 2004
    Assignee: Dongbu Electronics Co., Ltd.
    Inventor: Cheolsoo Park
  • Patent number: 6804573
    Abstract: Apparatus and methods for generating embroidery data from image data automatically identify at least one image characteristic based on at least one of edge contour data and skeletal data. The identified at least one image characteristic includes at least one of a singularity, a discontinuity and a concavity. The methods and apparatus generate the embroidery data based on the at least one image characteristic.
    Type: Grant
    Filed: September 10, 2001
    Date of Patent: October 12, 2004
    Assignee: Soft Sight, Inc.
    Inventor: David A. Goldman
  • Patent number: 6804501
    Abstract: A receiver generates two metrics, one that is used to control the gain of an amplifier and the other that is used to determine the presence of narrowband interference, such as IMD. The two metrics may represent analog-to-digital converter (A/D) saturation and average signal strength, either of which may be used to control gain or to detect the presence of narrowband interference.
    Type: Grant
    Filed: September 25, 2000
    Date of Patent: October 12, 2004
    Assignee: PrairieComm, Inc.
    Inventors: Wayne H. Bradley, John W. Diehl
  • Patent number: 6799994
    Abstract: A cord management apparatus that provides for the convenient management of cords associated with the retail display of small electronic devices such as video cameras. The apparatus comprises a multi-conductor cable, a retractable reel for dispensing and retracting the cable, a mounting member for mounting the electronic device, an adapter for connecting the cable to the electronic device, and a base member for removably holding the mounting member. The base member is fastened to a display rack or counter. A plurality of adapters are provided so that the apparatus may be used with a wide variety of devices that may have different connection requirements.
    Type: Grant
    Filed: May 14, 2002
    Date of Patent: October 5, 2004
    Assignee: Telefonix, Inc
    Inventor: Paul C. Burke
  • Patent number: 6794233
    Abstract: A method of fabricating a MOSFET is disclosed.
    Type: Grant
    Filed: July 25, 2003
    Date of Patent: September 21, 2004
    Assignee: Dongbu Electronics Co., Ltd.
    Inventors: Yongsoo Cho, Seung-Ho Hahn
  • Patent number: 6794702
    Abstract: A semiconductor device and a fabrication method thereof in which the semiconductor device includes capacitors having a metal/insulator/metal (MIM) structure are disclosed. The method includes forming an interlayer insulating film on a structure of a semiconductor substrate that exposes lower wiring and a lower insulating film; selectively etching the interlayer insulating film to form a first electrode opening that exposes the lower wiring; forming a first electrode in the first electrode opening such that the first electrode opening is filled; selectively etching the interlayer insulating film at a region of the same adjacent to the first electrode to thereby form a second electrode opening; forming a dielectric layer along inner walls that define the second electrode opening; forming a second electrode on the dielectric layer in such a manner to fill the second electrode opening; and forming upper wiring on at least a portion of the second electrode.
    Type: Grant
    Filed: July 30, 2003
    Date of Patent: September 21, 2004
    Assignee: Anam Semiconductor Inc.
    Inventor: Geon-Ook Park
  • Patent number: 6790754
    Abstract: Method for forming contact electrodes in a semiconductor device are disclosed. An example method comprises sequentially forming a pad oxide layer, a pad nitrate layer, a dummy oxide layer, and a capping nitride layer on a substrate. These layers and the substrate are then patterned to form a trench. The trench us filled with an insulating material to form a device isolation stripe. The resulting structure is then patterned to form a trench. Spacers are formed on the sidewalls of the trench and ions are implanted into the substrate beneath the trench to form local channel portions. A gate insulating layer and a gate electrode are then formed by deposition. Thereafter, the dummy oxide layer and the capping nitride layer are removed and source/drain portions are defined. Contact electrodes are then formed by deposition of a metal layer.
    Type: Grant
    Filed: December 29, 2003
    Date of Patent: September 14, 2004
    Assignee: Dongbu Electronics
    Inventor: Cheolsoo Park
  • Patent number: RE38696
    Abstract: In order to create interest in advertising pieces in a consumer, a pop-up advertising piece includes a booklet-shaped advertiser movable from a closed position to an open position. An anchoring strip is in vertical confronting relation to a normally inwardly facing surface of one of the cover portions and has top and bottom edges secured to the normally inwardly facing surface in general proximity to top and bottom edges thereof. An internal substrate has one vertical edge secured to the one of the cover portions opposite the anchoring strip and the other vertical edge is secured to the anchoring strip. A first fold line is provided on the internal substrate in spaced relation to a generally vertical fold line of the booklet-shaped advertiser when it is in the closed position. The internal substrate also has a second fold line on the side of the anchoring strip opposite the first fold line.
    Type: Grant
    Filed: October 21, 2002
    Date of Patent: February 8, 2005
    Assignee: R. R. Donnelley & Sons Company
    Inventor: Bruce D. Williams