Abstract: An apparatus for attaching a pliable material, such as a towel, to a more rigid structure, such as a golf bag, is disclosed. The apparatus includes a body. The body has a cylindrical, vertically disposed bore. The body of the apparatus is attached to the rigid structure. A ball of smaller diameter than the bore of the body is wrapped in the pliable material and forced into the bore. The pliable material is thereby wedged between the ball and the wall of the bore.

Abstract: A dual-mode baseband controller enables a single integrated circuit to support either In-Phase Quadrature (I-Q) or Non-Return to Zero (NRZ) radio-frequency transmitter architectures for use in second generation (CT2) cordless telephones. A radio frequency (RF) interface circuit controls output signals to support either the I-Q architecture or the NRZ architecture, depending on a MODE control bit received from a controlling integrated circuit. The RF interface circuit comprises an I-Q waveform generator, four multiplexers, two digital-to-analog converters, a buffer, interconnecting circuitry, and a timing controller operating under configurable software control.

Abstract: A frequency divider/counter circuit utilizing at clock and a clear signal to divide the clock by an odd value. A first adder receives the clock and the clear signal, and has a carry-in input, and generates an adder output and carry-out output. A second adder also receives the clock and the first adder cell carry-out output, and generates an adder output. A reset cell receives the clock and the clear signal, and has an input and generates a reset output. Logic receives selected adder outputs and generates a divider output when the odd value is reached, wherein the first adder receives the divider output as its carry-in input, the second adder receives the carry-out output of the first adder as its carry-in input and the reset output as its clear input, and the reset cell receives the divider output as its input.

Abstract: The present invention disclosed an input/output data port circuit which connects a parallel data bus with an input serial data bus and an output serial data bus. The input/output data port is selectively operable in either a linear mode or a buffered mode. The input/output port is comprised of an interface register that is connected to a parallel data bus, a serial input bus and a serial output bus; a temporary register that is serially connected to the interface register, an outbound register that is connected in parallel to the temporary register and serially connected to a serial bus; and an inbound register that is connected in parallel to the temporary register and serially connected to a serial, bus.

Abstract: A system for measuring thicknesses of a layered workpiece in a silicon integrated circuit manufacturing process. The system includes means for measuring a resistivity of said workpiece, such as an M-Gage; means for transforming a first signal set output by said means for measuring to a second signal set; and means for determining thicknesses of said workpiece layers from said resistivity capable of interpreting the second signal set. The means for transforming includes an interface board. The interface board receives the first signal set and emits the second signal set for receipt by the means for determining when an appropriate signal is received from the means for determining.

Abstract: A device for simultaneously detecting more than one condition, where each condition corresponds to a specific memory cell of an array of more than one memory cell, each specific memory cell of the array having a distinct index given by a first number of bits and a distinct associativity given by a second number of bits, each condition triggers a particular, distinct task, and each task, if more than one, is prioritized.

Abstract: The invention is a device for determining an address of a modified line in a cache memory and retrieving a tag, a data, and a corresponding associativity to execute a copyback routine to an external memory for the modified line. The cache memory includes an attribute array, a tag array, and a data array. The device includes a priority lookahead encoder logic circuit which simultaneously checks a status bit in each line of the attribute array to determine whether one or more modified lines are indicated. The priority lookahead encoder logic circuit then prioritizes the modified lines, if more than one is detected, for purposes of a copyback routine writing the modified lines to external memory. The device then generates an address of external memory which corresponds to each of the modified lines as and when each becomes next in priority for copyback. Finally, the device retrieves and holds data which corresponds to each of the modified lines for copyback.

Abstract: A semi-conductor device has a substrate with an oxide layer thereover. Within the oxide layer are a plurality of rows of polycrystalline material which represent the rows in the transistor array. Over the top of the oxide material are a plurality of columns of metal areas which represent the columns of the transistor array. Below each intersection of a metal layer and a gate layer are contact areas in the substrate which align with the gate to form a transistor within the semi-conductor device. The source implant for all transistors are connected to ground. The drain implant of each transistor is connected to the metal layer above through a window in the oxide material only if a transistor is required at the specific row and column intersection for a specific pre-programed memory.

Abstract: A clock switcher circuit for providing at least one set of clock signals selected from a plurality of clock sources. A first clock signal having a first pulse length and a second clock signal having a second pulse length are circuit inputs. Another circuit input is a clock selection input. When the clock selection input indicates a new output clock signal, different from the then current output clock signal, should be output by the circuit, the circuit provides a means for switching to output the new output clock signal. In switching to output the new output clock signal, the circuit prevents the occurrence of the output clock signal ever having a pulse shorter than the normal pulse length of the then current output clock signal, whether the then current output clock signal is the first clock signal or the second clock signal.

Abstract: A packer for a subterranean oil and/or gas well. The packer has a control signal bypass passage incorporated in the packer body. The control signal bypass passage may be opened and closed via reeled tubing to selectively allow and disallow passage of a control signal through the packer. The packer supports an electric submersible pump for enhancing flow of well fluids. The control signal bypass passage of the packer connects with a control line from the surface and with a separate control line extending downhole from the packer in the well. The control line, downhole from the packer, connects with a safety valve operable by control signal passed from the surface, through the packer, and downhole through the control signal bypass passage of the packer.

Abstract: An operational amplifier for low supply voltage applications. The operational amplifier includes inverting and non-inverting inputs and a single-ended output. The operational amplifier also includes source transistors for pushing the output and sink transistors for pulling the output to obtain particular output voltage swing. Connections between the inputs and output include DC biasing circuitry. In low supply voltage applications, voltage drop due to transistors of amplifier circuitry can be significant and can affect possible range of output voltage swing.

Abstract: A method to functionalize carbohydrate derivatives by base-induced .beta.-elimination and subsequent olefination to form biologically active products containing .alpha.-hydroxy-diene or .alpha.,.beta.-dihydroxy-diene subunits. Also disclosed are methods to prepare biologically active derivatives of fatty acids containing .alpha.-hydroxy-diene groups and .alpha.,.beta.-dihydroxy-diene groups from derivatives of 2-deoxyfuranoses and derivatives of 2-deoxypyranoses, respectively.

Abstract: A control system for applying power to a solenoid operated valve in a well completion within a borehole. The control system includes a programmable power supply for selectively applying electric power to a solenoid coil of the valve. The control system operates to apply a higher value of current to the solenoid to open the valve and a second lower value of current to maintain the operation of the solenoid in an open state and also to interrupt all current to the solenoid to close the valve. A timer controls the length of time the higher current value can be applied to the solenoid if the valve does not open and the length of delay time which must be included before again attempting to open the valve. The control system continuously monitors the state of actuation of the valve by means of an inductance monitor for determining the position of the armature of the solenoid and, thus, the state of the valve.

Abstract: An improved method of planarizing a side surface of a partially completed integrated circuit device comprises, in sequence, the steps of depositing on the side surface a spin-on glass coating; partially curing the coating; back etching the coating to remove portions thereof which overlie insulation-encapsulated electrically conductive portions of the device; and then subjecting the remaining coating portions, which are disposed within and level off previously depressed portions of the side surface, to an oxygen plasma final curing process, preferably utilizing a downstream stripper type oxygen plasma generator. By performing the back etching step prior to the oxygen plasma curing step, undesirable cracking of the remaining coating portions is advantageously avoided.

Abstract: A pivoting drive system for the application of rectilinear drive force, wherein the rectilinear force is converted to a rotational force. The apparatus employs a frame on which are mounted pedals for rectilinear motion. The pedals are linked with a cable linkage and when moved along rectilinear paths cause the cable linkage to move. The cable linkage is wrapped several times around dual wrap spools which turn as the cable linkage is moved. A unidirectional clutching mechanism incorporated with the wrap spools causes a pivot axis to rotate unidirectionally on rotation of the wrap spools. The pivot axis may be connected with a sprocket and drive chain assembly to provide propulsion force, for example, to a bicycle wheel.

Abstract: Disclosed is a low entry force connector socket having a cage with a wire basket formed within it by contact wires which are fixed to the cage in notches on the end rims thereof, and which wires are rotationally offset within the cage to form the wire basket for engaging a connector pin. The wires are mounted in the cage by being hooked on notches provided in the end rims of the cage, and are moved to their rotationally offset orientations in a series of stages, following which they are fixed in position and the external portions of the socket are mounted to enclose the cage while a tool pin is positioned in the wire basket to establish the desired connecting force of the socket.