Patents Represented by Attorney H. M. Weiss
  • Patent number: 4058887
    Abstract: A method of manufacturing an insulated gate field effect transistor comprising providing a semiconductor body portion of one type conductivity, providing on a surface of said body portion an impurity masking layer having two adjacent apertures with the portion of the masking layer between said apertures and part of its thickness being of a masking material other than silicon dioxide and also capable of masking the silicon against oxidation, providing by impurity introduction through said apertures spaced surface regions of opposite type conductivity in said body portion, subjecting at least the surface portions of the body portion overlying the opposite type surface regions and adjacent the oxidation masking material to an oxidation treatment causing thereon the growth of a silicon dioxide that penetrates into the body portion except where masked by the oxidation masking material forming a silicon mesa under said oxidation masking material, applying a gate electrode insulated from and over the surface portion
    Type: Grant
    Filed: October 13, 1972
    Date of Patent: November 22, 1977
    Assignee: IBM Corporation
    Inventor: David Dewitt