Abstract: Various approaches related to systems and methods for reusing decoding parity.

Abstract: Various data acquisition, storage and/or distribution systems and devices are described herein. As one example, a mobile data acquisition and distribution device is described. The device includes a non-volatile storage medium, a wireless interface, and a processor. The non-volatile storage medium includes instructions executable by the processor to: receive a user data set, and to store the user data set to the non-volatile storage medium. The instructions are further executable by the processor to receive a request initiated through a remote user interface via the wireless interface. Where the request is to provide the user data set to a recipient device, the instructions are further executable by the processor to provide the user data set to the recipient device via the wireless interface.

Abstract: Various embodiments of the present invention provide systems and methods for data processing. For example, a data processing circuit is discussed that includes a data detector circuit, a detector mimicking circuit, and an error calculation circuit. The data detector circuit is operable to perform a data detection process on a first signal derived from a data input to yield a detected output. The data mimicking circuit is operable to process a second signal derived from the data input to yield a mimicked output. The error calculation circuit is operable to calculate a difference between the second signal and a third signal derived from the mimicked output to yield a feedback signal. The feedback signal is operable to modify the data input during a subsequent period.

Abstract: The present invention relates to and provides methods and promotional hang tags, tags or labels with associated product samples combined with interactive quick response or scan-able codes linked to internet Uniform (or Universal) Resource Locator (URL) for providing contact information, promotional or cross promotional product samples or products and related marketing information regarding product promotional or cross-promotional features, where the hang tag, tag or label carries any scan-able quick response internet URL code or QR code and an integral product sample, such as, but not limited to, a fragrance, a personal care product, a healthcare product, a food or beverage product, an entertainment product, a toy, a gift card, a book, an e-book, software, a website access code, an office supply product, school supply product, a travel size product, a consumer electronics product, a health and wellness product, a health and beauty product, a medical product, an educational product.

Abstract: Various embodiments of the present invention provide systems and methods for data processing system. As one example, a data processing circuit is described that includes an analog to digital converter, an online timing loop, and an offline timing loop. The analog to digital converter receives an analog input and provides a first series of data samples Each bit of the first series of data samples corresponds to the analog input at a time controlled by an updated sampling clock. The online timing loop modifies the updated sampling clock based at least in part upon a processed version of the first series of data samples. The offline timing loop interpolates a derivative of the first series of data samples to yield a second series of data samples that mimics a series of data samples corresponding to the analog input that were sampled using a free running clock.

Abstract: The present invention relates to and provides methods and product, product samples, containers, or packaging comprised of interactive quick response or scan-able codes linked to Internet Uniform (or Universal) Resource Locator (URL) for providing contact information, promotional or cross promotional product samples or products, containers, or and packaging, where the product, product sample, container, or packaging, has any type of associated scan-able internet quick response URL code, quick response MS TAG or quick response QR Code that delivers an interactive “infotainment” brand experience to consumers or retailers when the product or package is scanned with a smart phone, internet tablet, computer, netbook, or other device.

Abstract: Various embodiments of the present invention provide systems and methods for data processing. For example, some embodiments of the present invention provide data processing circuits including a pattern detection circuit having at least two data detector circuits each operable to receive the same series of data samples and to provide a first detected data output and a second detected data output, respectively. In addition, the data pattern detection circuit includes a result combining circuit that is operable to assert a pattern found output based at least in part on the first detected data output and the second detected data output.

Abstract: Various embodiments of the present invention provide systems and methods for synchronizing data processing. As one example, a method for synchronizing data processing is disclosed that includes receiving a data input, and sampling the data input at a sample period to generate a sample set. A first pattern is received and a first periodic boundary associated with the first pattern is identified. In one particular case, the first pattern is a preamble pattern included as sector data on a storage medium, and the first periodic boundary is a 4T boundary. Further, a second pattern is detected in the sample that is used to establish a second periodic boundary. In one particular case, the second pattern is a SAM pattern included as sector data on a storage medium, and the second periodic boundary is a 1T boundary. Based at least in part on the first periodic boundary and the second periodic boundary, a time to transmit or assert a data-found signal is determined.

Abstract: Various embodiments of the present invention provide systems and methods for data processing. For example, a data processing circuit is disclosed that includes a first data detection circuit that applies a phase dependent data detection algorithm to a data set such that a first output of the first data detection circuit varies depending upon a phase of the data set presented to the first data detection circuit. A first phase of the data set is presented to the first data detection circuit. The circuits further include a decoder circuit that applies a decoding algorithm to the first output to yield a decoded output, and a phase shift circuit that phase shifts the decoded output such that a second phase of the data set is provided as a phase shifted output.

Abstract: Various embodiments of the present invention provide systems and methods for data processing. For example, a data processing circuit is disclosed that includes an increased iteration enable signal, a first detector circuit, a second detector circuit, and a data decoding circuit. The first detector circuit receives a data set and performs a data detection on the data set to provide a detected data set. The data decoding circuit receives a derivative of the detected data set and performs a decoding process to provide a decoded data set. The decoded data set is provided to the second detector circuit based at least in part on an assertion level of the increased iteration enable signal.

Abstract: Various embodiments of the present invention provide systems and methods for sector address mark detection. As an example, data detection systems are disclosed that include a sector address mark detection circuit and a sector address mark quality detection circuit. The sector address mark detection circuit receives a data stream and identifies a sector address mark in the data stream. The sector address mark quality detection circuit receives a first sample and a second sample from the data stream corresponding to the sector address mark, and determines a quality of the sector address mark based at least in part on the first sample and the second sample. In various cases, one or more of the samples of the sector address mark up to all of the samples of the sector address mark may be used.

Abstract: Various embodiments of the present invention provide systems, methods and circuits for memory utilization. As one example, a memory system is disclosed that includes a memory bank and a memory access controller circuit. The memory bank includes a number of default memory cells and a number of redundant memory cells. The memory access controller circuit is operable to access a usable memory space including both the combined default memory cells and the redundant memory cells.

Abstract: Various apparatuses and methods for a vacuum electronic device are disclosed herein. In one embodiment, a vacuum electronic device includes a vacuum housing, an array of slow wave structures inside the vacuum housing sharing a common electron beam tunnel, an electron beam input port at a first end of the common electron beam tunnel, and an electron beam output port at a second end of the common electron beam tunnel.

Abstract: Various embodiments of the present invention provide systems and methods for data processing. For example, a variable iteration data processing system is disclosed that includes at least a first detector, a second detector, a decoder, and a queuing buffer. The first detector is operable to perform a data detection on an input data set at a first time. The decoder receives a derivation of an output from the first detector and performs a decoding process. Where the decoding process fails to converge, the decoder output is passed to the second detector for a subsequent detection and decoding process at a second time.

Abstract: Various systems and methods for power management are disclosed herein. For example, a synchronous semiconductor circuit is disclosed that includes two or more clock sources and a power management controller. The power management controller is operable to apply power to one of the clock sources and to select another of the clock sources for synchronization of the circuit. Then, upon stabilization of the first clock source, it is selected by the power management controller to synchronize the circuit.

Abstract: Various embodiments of the present invention provide systems, methods and circuits for power management and/or EMI reduction. As one example, a method for memory system access is disclosed that includes providing a first bank of memory; providing a second bank of memory; receiving a memory access request that includes assertion of a reference memory clock; accessing the first bank of memory using a first sub memory clock asserted relative to the reference memory clock; delaying a phase offset; and accessing the second bank of memory using a second sub memory clock asserted the phase offset after assertion of the first sub memory clock.

Abstract: Various embodiments of the present invention provide systems and methods for data processing. For example, a variable iteration data processing system is disclosed that includes a first detector, a second detector, a decoder and a unified memory buffer. An input data set is received by the first detector that performs a data detection and provides a first detected data set. The decoder receives a derivative of the first detected data set and performs a decoding operation that yields a decoded data set. In some cases, the derivative of the first detected data set is an interleaved version of the first detected data set. The decoded data set is written to a unified memory buffer. The first decoded data set is retrievable from the unified memory buffer and a derivative thereof is provided to the second detector. In some cases, the derivative of the decoded is a de-interleaved version of the decoded data set.

Abstract: A dimming power supply includes a power source, a full bridge rectifier with four nodes, a control switch and a controller. The first node is connected to the power source, the second is connected to a load output, and the third is connected to a reference voltage node. The control switch is connected between the fourth node and the reference voltage node. The controller is connected to a control input of the control switch. The controller is adapted to adjust a voltage or current through the load output.

Abstract: Various embodiments of the present invention provide systems and methods for governing power dissipation in a semiconductor device. For example, various embodiments of the present invention provide semiconductor devices that include a first function circuit, a second function circuit, and a power state change control circuit. The power state change control circuit is operable to determine a combination of power states of the first function circuit and the second function circuit that provides an overall power dissipation within a power dissipation level.

Abstract: Various embodiments of the present invention provide systems and methods for data processing. For example, a data processing circuit is discussed that includes an analog to digital converter circuit, a digital filter circuit, a data detector circuit, a mimic filter circuit, and a sample clock generation circuit. The analog to digital converter circuit is operable to receive a data input and to provide corresponding digital samples. The digital filter circuit is operable to receive the digital samples and to provide a filtered output. The data detector circuit is operable to perform a data detection process on the filtered output to yield a detected output. The mimic filter circuit is operable to receive the digital samples and to provide a mimicked output. The sample clock generation circuit is operable to provide a sample clock based at least in part on the detected output and the mimicked output.