Abstract: A method and system for manufacturing information handling systems analyzes orders for information handling system configurations to select one or more configurations for imaging. For instance, frequently ordered configurations or configurations that are time consuming to manufacture are selected for imaging. When an information handling system having a selected configuration is manufactured, an image of the manufactured information handling system is saved in an image cache. Subsequent information handling systems having the selected configuration are manufactured by copying the saved image to the information handling system, thus reducing the time for loading software onto the information handling system.

Abstract: A multi-point video conferencing system and method for managing display of images of multiple participating locations and bandwidth allocated for a multi-point video conference. The multi-point video conferencing system detects an audio signal associated with an image not currently displayed to each participating location in the multi-point video conference. When the number of active display windows is less than the maximum number of active display windows, a first active display window is activated and the image displayed in the first active display window. When the number of the active display windows is not less than the maximum number, a second active display window of the active display windows is inactivated, a third active display window is activated, and the image is displayed in the third active display window.

Abstract: A demand fulfillment system and method to provide current supply and demand to generate a work schedule and a material delivery schedule for manufacturing items, particularly commodities, built to customer order. The demand fulfillment system and method uses outstanding customer orders for items as an accurate measure of current demand, and a current state of an available inventory of material for producing the items as an accurate measure of current supply. Customer orders are considered a source of demand from the time the customer order is received until the customer order is fulfilled. Material available to the factory is considered to be part of supply regardless of location of the material. A work schedule and a material delivery schedule are generated periodically using the current state of the available inventory and outstanding customer orders to keep up with consumption of materials and fulfillment of customer orders.

Abstract: A microelectronic device design verification system and method estimates the entropy of stimuli communicated over an interface to verify a microelectronic device design and feeds back the estimated entropy to alter the generation of stimuli to improve the design state space verified by additional stimuli applied to the microelectronic device design. For instance, predetermined factors used for random or directed generation of stimuli are altered based on the estimated entropy of stimuli communicated over an interface to a microelectronic device design software model or hardware integrated circuit implementation. The predetermined factors are adjusted so that subsequent stimuli has a desired impact on the estimated entropy, such as an increase in entropy that indicates a more complete microelectronic device design verification.

Abstract: An optical drive writes information to an optical medium by obtaining a write strategy for the optical medium from a source external to the optical drive. A write module in the optical drive reads an optical medium identification code from the optical medium and determines that the write strategy for the optical medium is unavailable from an optical drive write strategy table. The write module communicates a request for a write strategy associated with the optical medium identification code read from the optical medium to a host information handling system which obtains the requested write strategy for the optical drive from a host write strategy table or a network location. Periodic updates from the network to the host information handling system and from the host information handling system to optical drive firmware aid in maintaining the optical drive's write strategy list up to date.

Abstract: A system for externally controlling keyboard video monitor (KVM) functions within a server blade architecture. The system includes an external KVM controller and a server blade chassis coupled to the external KVM controller. The server blade chassis includes a server blade and a management module coupled to the server blade. The management module includes an integrated KVM module. The integrated KVM module detects whether the external KVM controller is coupled to the server blade chassis. When the external KVM controller is coupled to the server blade chassis, the integrated KVM module functions as a relay agent between the external KVM controller and the server blade. When the external KVM controller is not coupled to the server blade chassis, the integrated KVM module functions as a master KVM controller for the server blade chassis.

Abstract: An optical medium storage device improves the usable life of re-writable optical storage mediums, such CD-RW, DVD+RW and DVD-RAM disks, by adjusting write parameters to compensate for time between an initial write on the optical storage medium and the current time, with adjusted write parameters fine-tuning signal-to-noise ratios and improving the number of reliable overwrites for the optical storage medium.

Abstract: A method and system dampens vibrations associated with a device installed in a system by supporting the device with one or more support members having a rigid support portion and a dampening support portion made from an elastic material. In one embodiment, an information handling system fan assembly is made with two shot injection molding to form a support member with an integrated dampener that holds a fan mount disposed in a cooling air channel defined by a fan housing. The fan housing, mount and rigid portion of the support member are formed with one shot from a substantially rigid material and the dampening portion is formed with another shot from a substantially elastic material. A fan couples to the fan mount for installation in the information handling system.

Abstract: A presentation module associated with the BIOS of an information handling system, such as a portable computer, allows an intermediate level driver, such as a dynamic link library, to set the presentation display type. In one embodiment, a graphical user interface on a portable computer LCD calls a presentation dynamic link library to coordinate selection and unselection of a projector for displaying information from the portable computer. Upon selection of the projector, the presentation module detects the resolution of the projector and a resolution application programming interface sets the projector resolution of the portable computer to the highest supported resolution.

Abstract: A method for optimizing buffers in an integrated circuit design. The method includes identifying paths and nodes within the integrated circuit design, determining node overlap within the integrated circuit design, calculating possible solutions for addressing timing violations within the integrated circuit design, choosing a solution for addressing timing violations, inserting buffers at particular nodes of the integrated circuit design, and repeating the calculated possible solutions wherein choosing a solution and inserting buffers at particular nodes to address timing violations are within the integrated circuit design.

Abstract: An adaptive reference voltage method and system analyzes a received bus signal to evaluate voltage swing characteristics and adjusts the reference voltage for reading the signal to a level that compensates for variations in margins between high and low signal switching values such as are introduced by noise. A bus input signal analyzer circuit incorporated in an integrated circuit analyzes the bus signal received at the integrated circuit to adjust the reference voltage used by the integrated circuit. In one embodiment, the bus input signal analyzer circuit applies a feedback loop to adapt the reference voltage by setting high and low input values to a reference voltage generation circuit with the reference voltage centered between the high and low values, such as results from a resistor divider network.

Abstract: The present invention provides a hierarchical interface to an attribute based database. The method includes organizing a number of classifiers of data into a hierarchical structure and organizing the data into the hierarchical data structure according to the classifiers to which the data is linked. The hierarchical data structure can be a file system directory tree structure. The files system directory tree structure can be according to the NFS protocol. A request is received from a client, the request formatted according to the NFS protocol. The request is translated into a database query. A result is produced which is formatted according to the NFS protocol and the result is sent to the client. The present invention allows data to be presented in rearrange-able order based on a client view and classifiers, bound and unbound. The present invention also restricts access to files in a flexible manner.

Abstract: A system and method for managing power consumption of an information handling system dynamically switches between high and low clock speed data transfers with double data rate (DDR) memory. The selection of a high clock speed dynamically switches the DDR memory to connect to a parallel termination for more rapid data transfers with increased power consumption. The selection of a low clock speed dynamically switches the DDR memory to disconnect the parallel termination for slower data transfers with reduced power consumption. In one embodiment, portable computer graphics DDR memory reduces power consumption by selecting low clock speed transfers without parallel termination when operating on internal power. The portable computer graphics DDR memory provides improved display resolution by selecting high clock speed transfers with parallel termination when operating on external power or when displaying information from high resolution applications.

Abstract: A universal bus communicates information by one of plural bus protocols. A bus protocol selector is operable to select one of the plural bus protocols associated with a device interfaced with an information handling system and to communicate information over the bus with the selected bus protocol. An Input/Output chip includes a protocol selector unit that selects a bus protocol I/O unit to communicate with the device over the universal bus. The bus protocol I/O unit communicates over the universal bus by using a bus protocol that is compatible with the device. For instance, the one of plural available differential serial bus protocols is selected so that the bus protocol I/O unit communicates with the device using a bus protocol compatible with the device. In some instances, a bypass circuit configures the physical characteristics of the universal bus, such as by interfacing or removing a capacitor with the universal bus to support AC or DC coupled bus protocols.

Abstract: A power assisted cargo area extender is provided that consists of a top panel, a bottom panel, and two side panels. The bottom panel is part of or is attached to the tailgate of a truck or SUV and has channels in which the side panels slide. Once the tailgate is lowered, the top panel, which is adjacent to the bottom panel and connected to the bottom panel with hinges, is rotated upward and outward around the,hinges under control of a motorized actuator. In addition or separately, the side panels are extended and locked into an open position under control of a motorized actuator, and/or the top panel is closed to form a temporary tailgate. The top panel is latched to the side panels and the cargo area extender is fully deployed. These operations may be performed manually or via powered actuators or motors. The top panel may be equipped with an extension to increase the height of or modify the contour of the temporary tailgate.

Abstract: A system and method for verifying a memory consistency model for a shared memory multiprocessor computer systems generates random instructions to run on the processors, saves the results of the running of the instructions, and analyzes the results to detect a memory subsystem error if the results fall outside of the space of possible outcomes consistent with the memory consistency model. A precedence relationship of the results is determined by uniquely identifying results of a store location with each result distinct to allow association of a read result value to the instruction that created the read result value. A precedence graph with static, direct and derived edges identifies errors when a cycle is detected that indicates results that are inconsistent with memory consistency model rules.

Abstract: A flexible printed circuit improves data transfer rates by disposing ground wires in a ground plane proximate to signal wires disposed in a signal channel plane. One or more ground wires is associated with each signal wire pair or each signal wire for imaging of the return currents of the signal pairs. An overlapping alignment minimizes loop area between a ground wire and its associated signal wire. An offset alignment provides a reduced loop area and reduced breakage risk since movement of the flexible circuit does result in compression of the signal wire and its associated ground wire. A combination of overlapping and offset alignment balances signal transfer effectiveness with breakage risk by offsetting ground and signal wires is stress sensitive regions and overlapping ground and signal wires in stress tolerant regions.

Abstract: A system and method for adjusting the clock delay in a self-timed memory system having a memory array and a sense amplifier includes a programmable delay circuit coupled as an input to the sense amplifier for controlling the timing of when the sense amplifier is enabled in relation to the memory array addressing by generating a plurality of delayed versions of the sense amplifier enable signal and coupling one of the delayed versions of the sense amplifier enable signal to the sense amplifier in response to a control signal. By multiplexing multiple delayed versions of the sense amplifier enable signal under control of programmable delay selection logic, an optional delay is provided to make enable the sense amplifier more quickly or more slowly in reference to a memory array signal, depending upon control signal inputs to the selection logic.

Abstract: A universal bus communicates information by one of plural bus protocols. A bus protocol selector is operable to select one of the plural bus protocols associated with a device interfaced with an information handling system and to communicate information over the bus with the selected bus protocol. An Input/Output chip includes a protocol selector unit that selects a bus protocol I/O unit to communicate with the device over the universal bus. The bus protocol I/O unit communicates over the universal bus by using a bus protocol that is compatible with the device. For instance, the one of plural available differential serial bus protocols is selected so that the bus protocol I/O unit communicates with the device using a bus protocol compatible with the device. In some instances, a bypass circuit configures the physical characteristics of the universal bus, such as by interfacing or removing a capacitor with the universal bus to support AC or DC coupled bus protocols.

Abstract: A system and method for testing information handling systems distributes test units across a network to communicate with a test server. The test server communicates test executables and runtimes to the test units according to scripts of a script package, test engines associated with the test server and a test unit profile. To load and execute an executable and runtime on a test unit, a test controller associated with the test server sends an execution identifier to a test unit process abstraction layer controller. A validator of the test unit controller responds to the execution identifier with test unit configuration profile information that the test server controller applies to one or more test engines and a script to generate an executable and runtime that is sent to the test unit controller. An activator of the test unit process abstraction layer controller activates the executable scripts through the runtime and tracks test results.