Abstract: A recording medium, such as a high-density and/or read-only recording medium including a data area including at least two data sections and a linking area to link neighboring data sections, the linking area including at least two frame sync signals, where values of the at least two frame sync signals maintain uniqueness, and to methods and apparatuses for forming, recording, and reproducing the recording medium.

Abstract: Provided may be a semiconductor resistance element including resistance patterns disposed on an insulating substrate. The substrate may have first and second planer surfaces disposed in a first direction, third and fourth planar surfaces at least between the first and second planar surfaces in a second direction and fifth and sixth planar surfaces at least between the first and second planar surfaces in a third direction. The semiconductor resistance element may include a first resistance pattern configured to cover a selected one of the first and second planar surfaces and a second resistance pattern on at least one of the third through sixth planar surfaces.

Abstract: In one embodiment, the stacked package includes a first chip disposed over a package substrate. The first chip has at least one first chip dummy pad, and the first chip dummy pad is not electrically connected to circuits of the first chip. A first dummy bonding wire is connected to the first chip dummy pad and the package substrate. A second chip is disposed over at least a portion of the first chip, and the second chip has at least one second chip bonding pad. A first bonding wire is electrically connected to the second chip bonding pad and the first dummy bonding wire.

Abstract: In a COF of an embodiment of the present invention, the smaller distance to edges of a heat-releasing member an area of the heat-releasing member has, the larger openings the area has. Accordingly, a volume per area (an area per length) of the heat-releasing member decreases toward the edges. The arrangement improves flexibility of the COF. This prevents a stress caused by bending the COF from concentrating at the edges. This makes it possible to prevent a line on an insulating film from being broken. Also, it becomes possible to prevent an anisotropic conductive resin from coming off which is used to bond the COF with a display panel in providing the COF in a display apparatus.

Abstract: A color filter array is provided. The color filter array includes a plurality of basic filter blocks arranged in all directions. Each of the basic filter blocks include one or more color filters. The color filters include a first type color filter that passes through all light without filtering it or has a higher light transmittance than a second type color filter, a third type color filter, and a fourth type color filter. The second through fourth color filters being a red, green or blue filter. Accordingly, the color filter array increases sensitivity to incident light or increases brightness of outgoing light.

Abstract: A liquid crystal display apparatus includes a plurality of areas in which response speeds greatly different from each other coexist in a pixel. A first replacement process section replaces the image data of the desired target frame with a first gradation, when a gradation transition from a current frame to a desired target frame corresponds to the above gradation transition. A second replacement process section replaces the image data of the current frame with a second value. The first value is set to a value causing the pixel to respond at a relatively higher speed without the occurrence of the excessive brightness. Without avoiding the deterioration of the image, it is possible to drive a liquid crystal display apparatus including areas whose response speeds are different from each other coexist in the pixel, such as a liquid crystal display apparatus of vertically aligned mode and normally black mode.

Abstract: A semiconductor device to improve layout uniformity may include an active region formed in a substrate, a dummy active region formed in the substrate and separated from the active region, a word line crossing over the active region, and a dummy word line. The dummy word line is formed over the dummy active region to overlap at least part of the dummy active region and may have an end positioned within the dummy active region.

Abstract: In one embodiment, the access terminal (AT) receives a switching ratio, the AT randomly generates a serving priority value from a uniformly distributed random variable, and the AT determines whether to switch from the first carrier and attach to one of the neighboring carriers based on the serving priority value and the switching ratio.

Abstract: A signal output circuit of one embodiment of the present invention is provided in a unit stage of a shift register. The signal output circuit includes a set-reset flip-flop, and a signal generation circuit for generating an output signal by loading or blocking a clock signal in accordance with a signal inputted thereto. The signal output circuit is arranged such that: the signal generation circuit receives a signal outputted from the flip-flop and the output signal fed back to the signal generating circuit; and the output signal is fed back to a reset input of the flip-flop. This makes it possible to achieve a reduction in the area of the circuit and a simplification of the circuit.

Abstract: A reflective display device including: a substrate; a reflective layer on the substrate and configured to reflect light incident on the reflective layer; a color filter layer on the reflective layer; and an optical shutter layer on the color filter layer. Each pixel of a plurality of pixels of the reflective display device includes a plurality of sub-pixels and each sub-pixel includes the substrate, the reflective layer, the color filter layer, and the optical shutter layer, and for each pixel, the color filter layer includes a plurality of color filter elements corresponding to colors respectively obtained by the plurality of sub-pixels.

Abstract: In one embodiment, the non-volatile memory device includes a well of a first conductivity type formed in a substrate, and a first plurality of memory cell transistors connected in series to a bit line formed in the well. A buffer is formed in the substrate outside the well and is connected to the bit line. At least one de-coupling transistor is configured to de-couple the buffer from the bit line, and the de-coupling transistor is formed in the well.

Abstract: A bookbinding system to bind together a batch of sheets transported from an image forming apparatus. The bookbinding system includes a punch unit to form a predetermined number of ring holes in a predetermined portion along a side of the sheets to be bound one by one or in a batch, a ring-binding unit disposed downstream from the punch unit in a direction in which the sheet is transported to insert rings of a ring member into the ring holes formed on the batch of sheets by the punch unit, a ring detector disposed at a portion where the ring member is set to detect a type of the ring member, and a determination unit to determine whether or not an ring-binding operation is executable based on a type of the ring member and a size of the sheets to be bound together.

Abstract: A high-density optical disc such as BD-RE (Blu-ray Disc Rewritable) or BD-ROM, and a recording/reproducing method thereof are disclosed.

Abstract: In one embodiment of the present invention, a source driver includes a shift register including latch stages each including a level shifter that level-shifts clock signals so that the signals are fed into a set-reset flip-flop as inverted set input signals. Outputs from the set-reset flip-flop are delayed by a hazard preventing circuit and then fed into a level shifter in the next latch stage as enable signals. A delay trimming circuit causes a NAND circuit to perform a NAND operation with respect to outputs obtained by a delay of the outputs by a delay circuit and outputs from the level shifter in the next latch stage, so that a sampling pulse is derived. This allows for provision of a pulse output circuit capable of further trimming delay in output pulses and of securing a sufficient interval between the output pulses.