Patents Represented by Attorney, Agent or Law Firm Harold C. Baker
  • Patent number: 6623351
    Abstract: A modulator transportable collective protection system for the decontamination and containment of personnel in a toxic free area. A contamination containment area is provided through which personnel are decontaminated prior to entering the toxic free area. The migration of contaminants is prevented by causing a purge of clean filtered air from the toxic free area to the contamination control area and to the exterior environment. A blower and filter unit provides air to the toxic free area to maintain an over pressure therein, ensuring that all entry to the toxic free area is through a flow of clean air.
    Type: Grant
    Filed: May 9, 2002
    Date of Patent: September 23, 2003
    Inventor: Louis Brown
  • Patent number: 6593790
    Abstract: A power-up detector for detecting power-up and power supply voltage bump conditions includes a current mirror connected to the power supply. A pair of series connected resistors are connected between the current mirror and ground thereby providing a bias point at a junction of the series connected resistors. A field effect transistor having a source-drain circuit is connected between the current mirror and ground for providing an output signal to an inverter. The field effect transistor being is controlled by the voltage at bias point between the series connected resistors.
    Type: Grant
    Filed: February 8, 1999
    Date of Patent: July 15, 2003
    Assignee: Mosaid Technologies Incorporated
    Inventor: Hong Seok Kim
  • Patent number: 6591940
    Abstract: The invention relates to a sliding rail anchor safety device which is slidably mounted to the rail of a railway track. The device consists of a pair of pivotally interconnected jaw like members which defines claw-like structure which is configured to securely, yet slidably engage the rail of a railway track. A locking arm including a pair of alignable apertures defines a bore which receives a karabiner, which is turn connected to a worker's safety belt or tether.
    Type: Grant
    Filed: January 27, 1999
    Date of Patent: July 15, 2003
    Inventor: Norman Desjardins
  • Patent number: 6587440
    Abstract: A method of determining computer network topologies that dramatically reduces the computational complexity and greatly increases the accuracy of connection determination. The method involves classifying ports as either up or down. A source address table is compiled for each port of each data-relay device and each port is classified as either up or down. Up ports connect to other data-relay devices which report source address tables while down ports do not. After the classification, each source address in each up port table is replaced by the source address of the data-relay devices containing the down port whose table contains that source address. The tables of pairs of up ports are compared by intersection and minimal intersection defines the most probable connection for each up port. A variety of methods are used to remove invalid source addresses and the addresses of devices that have moved during the collection of the source address tables.
    Type: Grant
    Filed: July 8, 1999
    Date of Patent: July 1, 2003
    Assignee: Loran Networks Management Ltd.
    Inventor: Nicholas W. Dawes
  • Patent number: 6587920
    Abstract: A memory controller controls a buffer which stores the most recently used addresses and associated data, but the data stored in the buffer is only a portion of a row of data (termed row head data) stored in main memory. In a memory access initiated by the CPU, both the buffer and main memory are accessed simultaneously. If the buffer contains the address requested, the buffer immediately begins to provide the associated row head data in a burst to the cache memory. Meanwhile, the same row address is activated in the main memory bank corresponding to the requested address found in the buffer. After the buffer provides the row head data, the remainder of the burst of requested data is provided by the main memory to the CPU.
    Type: Grant
    Filed: November 30, 2000
    Date of Patent: July 1, 2003
    Assignee: Mosaid Technologies Incorporated
    Inventor: Nagi Nassief Mekhiel
  • Patent number: 6584072
    Abstract: A method of analyzing a communication network comprising determining a mean drop rate in a device x by polling each device from a network management computer (NMC) which is in communication with the network, and processing signals in the NMC to determine a drop rate D(x), in accordance with: D(x)=((L+(x)−L−(x))/2, and L(x)=1−A(x) where A(x): the fraction of poll requests from the NMC to device x for which the NMC receives replies (measured over the last M sampling periods), (wherein x must not be broken), D(x): the mean frame drop rate in device x, L(c): NMC's perception of the loss rate to device x and back, L−(x): the NMC's perception of the mean value of L(z) for all devices z connected to device x, closer to the NMC than device x and which are not broken, and L+(x): the NMC's perception of the mean value of L(z) for all devices z connected to device x, further away from the NMC than device x and which are not broken.
    Type: Grant
    Filed: March 8, 2000
    Date of Patent: June 24, 2003
    Assignee: Loran Network Management Ltd.
    Inventor: Nicholas W. Dawes
  • Patent number: 6580498
    Abstract: The present invention provides an apparatus and method of detecting, on a per wavelength basis, optical return loss at the output of an optical circuit pack. The optical circuit pack can be, for example, an optical amplifier. At an output port and reflected port of the optical circuit pack apparatus for detecting signals is connected. The output power and reflected power are measured, and the optical return loss is calculated. The return loss may be calculated for signals on one or more wavelength channels.
    Type: Grant
    Filed: February 2, 2001
    Date of Patent: June 17, 2003
    Assignee: Nortel Networks Limited
    Inventor: James Harley
  • Patent number: 6570518
    Abstract: A delta sigma modulator which uses at least one quantizer having a dead zone. The dead zone quantizer outputs a zero when its input is within the dead zone range. It outputs a predetermined value if the input is above the dead zone range. If the input is below the dead zone range, the quantizer outputs another predetermined value. Ideally, the quantizer dead zone thresholds are complimentary in that the upper threshold for an input is the positive value of the lower threshold. Also, to save on accumulator bits, the delta sigma modulator selects a predetermined number of most significant bits at different stages.
    Type: Grant
    Filed: January 4, 2001
    Date of Patent: May 27, 2003
    Assignee: Skyworks Solutions, Inc.
    Inventors: Thomas A. D. Riley, Tadeuse A. Kwasniewski, Thierry Lepley
  • Patent number: 6559699
    Abstract: A delay line comprised of analog delay elements each having a selectively adjusted coarse and fine delay portion is described. The coarse delay portion receives an input clock signal and generates a ramp signal having a slope based on a predetermined coarse delay setting. The fine delay portion generates a threshold voltage based on a predetermined fine delay setting. A comparator compares the coarse delay ramp signal voltage with the fine delay threshold voltage and generates an output clock signal when the ramp signal voltage surpasses the fine delay threshold voltage. The coarse delay is linearly adjustable based on a 32-bit binary input signal and the fine delay is binary-weight adjusted based on a 5-bit binary input signal. Both the coarse and fine delay portions are controlled by delay line control circuitry which compares a feedback version of the output clock signal with the input clock signal and provides control signals to increment or decrement coarse and fine delay in the delay line.
    Type: Grant
    Filed: November 7, 2001
    Date of Patent: May 6, 2003
    Assignee: Mosaid Technologies Inc.
    Inventors: Ki-Jun Lee, Gurpreet Bhullar
  • Patent number: 6560684
    Abstract: A method of operating a digital computer includes the steps of addressing a memory, reading a row of data from the memory, providing the same computational instruction simultaneously to each processor element of a plurality of processor elements, where each of the processor elements is selectively coupled to a corresponding bit position of the memory row of data, performing the same computational operation on a selected plurality of data bits in parallel, and writing the result into the memory at the same row from which the data was read.
    Type: Grant
    Filed: July 19, 2001
    Date of Patent: May 6, 2003
    Assignee: Mosaid Technologies Inc.
    Inventors: Duncan G. Elliott, W. Martin Snelgrove
  • Patent number: 6554013
    Abstract: A modulator transportable collective protection system for the decontamination and containment of personnel in a toxic free area. A contamination containment area is provided through which personnel are decontaminated prior to entering the toxic free area. The migration of contaminants is prevented by causing a purge of clean filtered air from the toxic free area to the contamination control area and to the exterior environment. A blower and filter unit provides air to the toxic free area to maintain an over pressure therein, ensuring that all entry to the toxic free area is through a flow of clean air.
    Type: Grant
    Filed: May 9, 2002
    Date of Patent: April 29, 2003
    Assignee: 1289309 Ontario Limited
    Inventor: Louis Brown
  • Patent number: 6504344
    Abstract: The invention relates to a device for managing battery packs by measuring and monitoring the operating capacity of individual battery modules in a battery pack. A programmable logic controller directs the selective closing of relays to allow individual battery modules to be load-tested using a variable discharge load unit, without compromising useful battery pack capacity. A battery module whose useful capacity falls below a predefined threshold may be connected to a battery charger for replenishment and then electrically realigned with the remaining modules in the pack for continued operation. Alternatively, an alarm may be triggered which alerts the user that the module is due for replacement. This sequence of events is performed on all cells in the pack at a predetermined interval.
    Type: Grant
    Filed: September 25, 2000
    Date of Patent: January 7, 2003
    Inventors: William Adams, James Dunn
  • Patent number: 6498801
    Abstract: A multiple stage laser system that produces coherent light in the ultraviolet range using phase conjugated Stimulated Raman Scattering and harmonic generation. The system uses a pump laser producing an input beam that is frequency shifted via phase conjugating Stimulated Raman Scattering. The Raman shifted beam is passed through a harmonic generation stage that produces the desired output beam by generating the required harmonic of the Raman shifted beam.
    Type: Grant
    Filed: August 5, 1999
    Date of Patent: December 24, 2002
    Inventors: Alexander E. Dudelzak, Guerman Pasmanik
  • Patent number: 6457281
    Abstract: A building module, modular building constructions and methods for erected same are disclosed. The module is of deep U-shape configuration, defining a space which is able to enclose various facilities within a building structure. A typical module includes a raceway and internal conduit system for power and/or communications system etc. Preset-levelling and self-centering device provide for quick erection of the modules in a wide variety of arrays and configurations to provide exterior walls and to enclose and define interior space.
    Type: Grant
    Filed: May 22, 1995
    Date of Patent: October 1, 2002
    Assignee: Teron International Building Technologies Ltd.
    Inventor: William Teron
  • Patent number: 6456472
    Abstract: The invention provides ESD protection for IC's while isolating the different power supplies from one another. A network in the IC has a plurality of circuit cells through which the IC receives power. Each circuit cell provides localized electrostatic discharge protection. With each circuit cell coupled to a global node through a dual current direction coupling network and with portions of the global node physically separating the circuit cells, any noise, interference, or stray ESD current generated by a circuit cell is shunted away from other circuit cells to the global node. An off-chip ground connection coupled to the global node provides a destination for this noise or interference.
    Type: Grant
    Filed: April 7, 2000
    Date of Patent: September 24, 2002
    Assignee: Philsar Semiconductor Inc.
    Inventor: Richard BĂ©riault
  • Patent number: 6438162
    Abstract: An apparatus and method for restoring digital pulses within a data transmission system which have degraded due to the attenuation and distortion inherent in a data transmission medium. The apparatus comprises an adaptive equalizer which receives signals from the data transmission medium, while the method by which the digital pulses are restored comprises: storing plural equalizer transfer function control values in a memory, passing the signal through an equalizer having a controllable transfer function, comparing a characteristic of the output signal of the equalizer with a reference signal and producing a difference signal, using the difference signal to select a set of stored transfer function control values from the memory, controlling the equalizer from the selected transfer function control values so as to minimize their difference from the reference signal. This apparatus and method are suitable for high-speed applications such as T1 and E1, requiring minimal configuration by the user.
    Type: Grant
    Filed: November 23, 1998
    Date of Patent: August 20, 2002
    Assignee: PMC-Sierra Ltd.
    Inventors: Graeme B. Boyd, Robert Sobot, David Heath Culley
  • Patent number: 6438365
    Abstract: An improved balanced mixer is provided for use in radio communication devices. The improved balanced mixer comprises a known Gilbert type mixer, a transconductance amplifier, a signal splitter, and a dual feedback structure from the pre-amplifier output to the input ports, thereby providing better linearity, that is, better input third order intercept point (IIP3), and improved impedance matching, without increasing the circuit noise figure.
    Type: Grant
    Filed: June 2, 1998
    Date of Patent: August 20, 2002
    Assignee: Philsar Semiconductor Inc.
    Inventor: Florinel Balteanu
  • Patent number: 6424929
    Abstract: A method of detecting outliers measured during progression of an activity of an entity from one point to another point, comprising measuring activity at a point in a first dimension, measuring the same activity at the same point in at least a second dimension referenced to the same time as measuring the activity in the first dimension, and rejecting outliers which have values outside a maximum expected difference between the activity measured in the first and second dimensions.
    Type: Grant
    Filed: September 20, 1999
    Date of Patent: July 23, 2002
    Assignee: Loran Network Management Ltd.
    Inventor: Nicholas W. Dawes
  • Patent number: 6411997
    Abstract: A method of determining a connection between a data emitting device and a network device which may carry the data, wherein the network device is comprised of a store for a data source address of a last frame transmitted to the network device and an input traffic count comprising (a) periodically reading the data source address, (b) periodically reading the input traffic count, (c) determining whether the data source address has always stayed the same, (d) in the event the data source address has always stayed the same, determine whether the traffic count has exceeded a predetermined threshold, (e) in the event the result of step (d) is true, indicate that the data source address identifies with acceptable probability a data emitting device directly connected to the network device.
    Type: Grant
    Filed: November 15, 1996
    Date of Patent: June 25, 2002
    Assignee: Loran Network Systems LLC
    Inventors: Nicholas Dawes, David Schenkel, Michael Slavitch
  • Patent number: 6407716
    Abstract: The present invention provides a dichroic surface with a pointed resonator cross grid pattern that offers enhanced bandwidth and a sharper response between frequency bands. The dichroic surface is fabricated as a self-adhesive decal, conforming the dichroic surface to the surface of the reflector antenna.
    Type: Grant
    Filed: April 19, 2001
    Date of Patent: June 18, 2002
    Assignee: EMS Technologies Canada, Ltd.
    Inventors: Peter C. Strickland, Timothy E. Best