Abstract: A Portable communication device includes in an interior of the portable communication device a ground plane and an antenna arrangement. The antenna arrangement includes an antenna element combination including a first radiating antenna element to be connected to a feeding potential and dimensioned for resonating in a first frequency band, and a second radiating antenna element dimensioned for resonating in a second frequency band. The antenna arrangement further includes at least one first element joining switch that in a closed position interconnects elements of the antenna element combination for dimensioning the antenna element combination for resonating in a third frequency band and in an open position separates these elements from each other, and a grounding switch which in a closed position joins the second radiating antenna element to a ground plane and in an open position separates the second radiating antenna element from the ground plane.

Abstract: A method for forming a memory device is provided. A first layer is formed over a substrate. A second layer is formed over the first layer. A mask is formed over the second layer. Spacers are formed adjacent opposite sides of the mask. The second layer is etched to form at least one memory cell stack. The memory device is cleaned to remove the mask. A silicide region is formed within the second layer in the at least one memory cell stack, where the silicide region in each memory cell stack is bounded by the spacers.

Abstract: A network device includes one or more processing units and an external memory. Each of the one or more processing units includes a centralized counter configured to perform accounting for the respective processing unit. The external memory is associated with at least one of the one or more processing units and is configured to store a group of count values for the at least one processing unit.

Abstract: A network device includes a memory and a packet forwarding engine. The memory stores a multicast list table, tag descriptor data and layer 2 (L2) encapsulation data. The packet forwarding engine receives a first pointer to an entry in the multicast list table, the entry including a second pointer to the tag descriptor data. The packet forwarding engine utilizes the second pointer to retrieve the tag descriptor data, the tag descriptor data including a third pointer to the encapsulation data. The packet forwarding engine constructs a packet header utilizing the retrieved encapsulation data and appends the packet header to a packet payload for forwarding out of the packet forwarding engine.

Abstract: A method of scheduling upstream bandwidth. This method comprises: 1) anticipating the need for the upstream bandwidth in advance of any specific request for said upstream bandwidth; and 2) scheduling the upstream bandwidth in accordance with such need.

Abstract: A hierarchical traffic policer may include a first policer configured to pass first packets when a first condition is met. The first policer also may alter selection information within the passed first packets. A second policer may be configured to pass second packets when a second condition is met. The second policer may be further configured to pass all of the passed first packets from the first policer based on the altered selection information within the passed first packets.

Abstract: A method is provided for programming a nonvolatile memory device including an array of memory cells, where each memory cell including a substrate, a control gate, a charge storage element, a source region and a drain region. The method includes receiving a programming window that identifies a plurality of memory cells in the array. A first group of memory cells to be programmed is identified from the plurality of memory cells in the programming window. The first group of memory cells is programmed and a programming state of the first group of memory cells is verified.

Abstract: The present invention is directed towards a method, a link check device, and a portable communication device for communication link check. The link check device (102) comprises a receiver unit (104) for receiving and monitoring information including a power control signal from a base station on a first link (109). A first and second signal generating unit (110, 112) connected to said receiver unit (104) provide a first and second noise signal (R1, R2), which are transmitted to a combining unit (114) to provide a third signal representing signal (R3) strength for communication links.

Abstract: Techniques for crawling hyperlinked documents are provided. Hyperlinked documents to be crawled are grouped by host and the host to be crawled next is selected according to a stall time of the host. The stall time can indicate the earliest time that the host should be crawled and the stall times can be a predetermined amount of time, vary by host and be adjusted according to actual retrieval times from the host.

Abstract: A system limits search results based on context information. The system obtains the context information and a search query, and obtains a set of references to documents in response to the search query. The system then filters the set of references based on the context information and presents the filtered set of references to a user.

Abstract: A method of manufacturing a memory device includes forming a first dielectric layer over a substrate and forming a charge storage element over the first dielectric layer. The method also includes forming a second dielectric layer over the charge storage element and forming a control gate over the second dielectric layer. The method further includes depositing an interlayer dielectric over the control gate at a high temperature.

Abstract: A device that receives data transmitted over a network medium includes a memory that stores phase information associated with a pilot tone. The device also includes logic that identifies a second pilot tone received with a number of tones and determines the phase of the second pilot tone. The logic also determines a difference between the phases of the two pilot tones and modifies phase information associated with a number of tones based on the difference. The received data with the modified phase information may then be decoded.

Abstract: Methods and apparatus for transferring packets in a packet switched communication system. A system is provided that includes an L2 device including a controller determining for each packet received whether the received packet is to be inspected, an inspection device operable to inspect and filter packets identified by the controller including using a zone specific policy and an L2 controller for transferring inspected packets in accordance with L2 header information using L2 protocols.

Abstract: A memory device includes multiple fins formed adjacent to one another, a source region, a drain region, a gate, a wordline, and a bitline contact. At least one of the multiple fins is doped with a first type of impurities and at least one other one of the fins is doped with a second type of impurities. The source region is formed at one end of each of the fins and the drain region is formed at an opposite end of each of the fins. The gate is formed over two of the multiple fins, the wordline is formed over each of the multiple fins, and a bitline contact is formed adjacent at least one of the multiple fins.

Abstract: A method of doping fins of a semiconductor device that includes a substrate includes forming multiple fin structures on the substrate, each of the fin structures including a cap formed on a fin. The method further includes performing a first tilt angle implant process to dope a first pair of the multiple fin structures with n-type impurities and performing a second tilt angle implant process to dope a second pair of the multiple fin structures with p-type impurities.

Abstract: A communication network design circuit can derive a path and a necessary link capacity for multiple point communication service permitting arbitrary communication within a predetermined range of communication amount by providing traffic amount of data in-flowing through an ingress node and traffic amount of data flowing out through an egress node. The communication network designing circuit has setting means for setting a mathematical programming problem for deriving the multiple point communication service and optimizing means for solving the mathematical programming problem set by the setting means and obtaining the path for the multiple point communication service.

Abstract: Non-volatile memory, such as Flash memory, is programmed by writing a window of information to memory. The programmed/non-programmed state of each memory cell may be dynamically determined for each window and stored as an indication bit. These techniques can provide for improved average power drain and a reduced maximum current per window during programming.

Abstract: A network device identifies priority level information for data frames it receives. The network device includes input ports, a memory, an action generator, and a port vector queue. The input ports receive the data frames. Each of the received data frames specifies one or more classes of service. The memory stores priority level information corresponding to each of the classes of service. The action generator generates an action tag for each of the received data frames. The port vector queue uses the action tag from the action generator for each of the received data frames to access the memory to identify the priority level information associated with the received data frame.

Abstract: A system provides search results relating to a point-of-view (POV). The system obtains a search query and POV data. The system generates a list of documents based on the search query and filters the list of documents based on the POV data. Alternatively, the system may perform a search based on the search query and the POV data to generate the list of documents. In either case, the system then presents the list of documents as the result of the search.

Abstract: A semiconductor memory device may include an intergate dielectric layer of high-K dielectric materials interposed between a charge storing layer and a control gate. The high-K materials may be deposited in such a manner that the materials are gradually graded with respect to one another.