Abstract: A method useful in the backside processing of semiconductor wafers includes providing a semiconductor wafer having a first surface that has been substantially processed. The processed first surface of the semiconductor wafer is bonded to a handle wafer. Once bonded to the handle wafer, backside processing may be performed on the wafer. Following backside processing, the wafer is sawn while still bonded to the handle wafer. The individual dice are then removed from the handle wafer. This process involves fewer handling steps of the semiconductor wafer and the handle wafer provides support to the semiconductor wafer during backside processing thereby reducing opportunities for breakage.

Abstract: A MOS switching circuit (1) for providing constant signal-independent gate-to-source voltage at a switching transistor (2) of a differential switched capacitor circuit so that a signal-independent resistance is provided between its source and drain includes a first control transistor (5) coupled between the input (3) and the gate of the switching transistor (2). The gate of switching transistor (2) is also coupled to a first clock phase signal PHI1 and the gate of the first control transistor (5) is coupled to a second, non-overlapping clock phase signal PHI2. A second control transistor (6) is coupled between the input (3) and the second clock phase signal PHI2 and its gate is coupled to the first clock phase signal PHI1. Capacitors (7) and (8) are coupled between the transistors (2, 5 and 6) and the clock phase signals PHI1 and PHI2, respectively.

Abstract: A beverage receptacle holder comprises a substantially circular first portion having a first end and a second end and a substantially circular second portion having a first and contiguous to the second end of the first portion and a second end. The first portion is of a first diameter while the second portion is of a second diameter which is larger than the first diameter. This enables the beverage receptacle holder to securely hold cups, glasses, cans, mugs and other beverage receptacles of various sizes.

Abstract: A method of fabricating heterojunction structures includes providing a semiconductor substrate and forming a plurality of semiconductor layers thereon. Ohmic and gate contacts are then formed on the plurality of semiconductor layers and portions of at least one of the semiconductor layers disposed between the ohmic and gate contacts are removed. Gate metal is then formed on the gate contacts. Source and drain regions are formed in the semiconductor layers and the formation is self-aligned to the gate metal. Following the formation of the source and drain regions, ohmic metal is formed on the ohmic contacts.

Abstract: A method of fabricating a trench structure includes providing a substrate having a first layer disposed on a surface thereof and a second layer disposed on the first layer. A trench is formed through the first and second layers and into the substrate. A dielectric liner is formed on the sidewalls of the trench which is then filled with a trench fill material. Portions of the trench liner disposed above the trench fill material are removed and a conformal layer is then formed on the trench structure. The conformal layer and a portion of the trench fill material are then oxidized.

Abstract: A method of forming planar isolation regions in semiconductor structures includes providing a semiconductor substrate and forming a semiconductor layer thereon. A dielectric layer comprising at least two different dielectric materials is disposed on the semiconductor layer and a trench is etched therethrough and into the semiconductor layer. Dielectric sidewalls are formed in the trench which is then filled by selectively forming depositing polycrystalline silicon therein. The semiconductor material is then at least partially oxidized to form the planar isolation region. The isolation regions disclosed herein may be used for both intradevice and interdevice isolation.

Abstract: A ceramic semiconductor package wherein metal crack arrestor patterns are formed in the corners of the package thereby increasing the strength of the package and acting as a barrier to microcracks. The metal crack arrestor patterns may be electrically and physically isolated from metal interconnect lines in the package and also may be formed using the same processing steps that are used to form the metal interconnect lines.

Abstract: A semiconductor device having a conductive recombination layer. The conductive recombination layer, comprised of doped polycrystalline material, doped polycrystalline material and tungsten silicide, or tungsten silicide, is disposed between two separate semiconductor substrates which are bonded together using a polished surface on the conductive recombination layer as one of the bonding interfaces. The conductive recombination layer recombines minority carriers and thereby increases the switching speed of the device.

Abstract: A method for removing nitride coatings from metal tooling and mold surfaces without damaging the underlying base metal includes placing the nitride coated metal surface into a plasma reactor and subjecting it to a gaseous plasma comprising a reactive fluorine species. The reactive fluorine species may be derived from one or more of many well known gases. An optional step of cleaning the nitride coating is recommended.

Abstract: A process for fabricating complimentary semiconductor devices having pedestal structures wherein both PNP and NPN transistors are formed simultaneously on the same substrate. After polysilicon layers have been patterned and etched, various polysilicon regions are doped with a plurality of conductivity types. This allows for there to be both P+ and N+ regions in the same polysilicon layer thereby enabling complimentary PNP and NPN transistors to be formed using a limited number of processing steps.

Abstract: A planarized dielectric isolation region for semiconductor devices and integrated circuits is created by providing a semiconductor substrate, providing on the substrate an oxide/nitride mask with an opening for defining the isolation region and a closed portion for defining the desired semiconductor islands, anisotropically etching a trench into the semiconductor substrate, isotropically etching the substrate so as to slightly undercut the oxide/nitride mask, thermally oxidizing the substrate to form a thin oxide layer on the bottom and sidewall of the trench wherein the outer surface of the thermal oxide approximately lines up with the edge of the oxide/nitride mask at the top of the trench sidewall, filling the trench with a conformal deposited material (preferably a dielectric), providing a mask over the conformal material which is the complement to the trench etch or island mask but of smaller lateral dimensions so as to cover those portions of the conformal layer which do not rise up over the semiconduct

Abstract: A metallization process for semiconductor devices wherein the metal deposition steps are performed at higher wafer temperatures than subsequent processing steps. The correlation between wafer temperature and maximum grain width is prevalent in many metals used for semiconductor device metallization such as aluminum. Therefore, by measuring and controlling the maximum grain width of the deposited metal during metal deposition steps, it is possible to control and adjust the wafer temperature.

Abstract: A semiconductor die for plastic encapsulation having an adhesion promoter selectively disposed on an outer surface enabling better adhesion between the semiconductor die and a plastic encapsulation. The improved adhesion allows for less relative motion between the semiconductor die and the plastic encapsulation. The reduction of relative motion significantly decreases the delamination progression throughout the semiconductor device and allows for an increased semiconductor device lifetime.

Abstract: An automated curing oven system for use in the manufacturing of semiconductors. This system may easily be incorporated with other automated machinery used for various semiconductor processing steps because it employs the same device holding magazine used for many other steps. The device holding magazine serves as the oven chamber itself thereby eliminating many manual handling steps.