Patents Represented by Law Firm Heilfgott & Karas
  • Patent number: 5015873
    Abstract: A semiconductor integrated device for applying a switching signal and an offset signal in superposed relation to each other to an external load connectable between an output terminal and a power supply terminal, comprises an offset signal supplying circuit for supplying an offset signal to the output terminal and including a first field effect transistor having a drain electrode connected to the output terminal, and a second field effect transistor having substantially the same characteristics as the first field effect transistor. The second field effect transistor has a drain electrode connected to a source electrode of the first field effect transistor, a gate electrode connected to a control terminal receptive of a control signal effective to control the offset signal, and a source electrode connected to a negative power supply terminal.
    Type: Grant
    Filed: March 15, 1989
    Date of Patent: May 14, 1991
    Assignee: NEC Corporation
    Inventor: Hiromitsu Hirayama