Abstract: The present invention implements a method and system for dynamically adapting the modulation and coding scheme for radio links in a wireless communications network based on a retransmission environment model in order to maximize throughput and most efficiently allocate bandwidth resources. The present invention encompasses a refined calculus and methodology for deriving the link adaptation thresholds in a retransmission environment using a complex model and analysis of the retransmission environment. The present invention holds particular application for wireless data communications as opposed to real time data services because it is based on a retransmission model applicable primarily for data services. A critical component of this new link adaptation system is a “no transmission” cutoff mode that is selected for SIR below a base threshold value. This new mode prevents system instability and misallocation of bandwidth in a wireless communication system.
Abstract: In connection with transmitted space-time, trellis encoded, signals that pass through a transmission channel that is characterized by memory, improved performance is realized with a receiver that combines a decoder with an equalizer that selects the trellis transition, s, that minimizes the metric ? j ? ( k ) = ? r ? ( k ) - ? l = 0 L 1 ? h ~ j ? ( l ) ? s ~ ? ( k - l ) - ? l = L 1 + 1 L + 1 ? h ~ j ? ( l ) ? s ^ ? ( k - l ) ? 2 where {tilde over (h)}j(l) is related to both the transmission channel and to the encoding structure in the transmitter, {tilde over (s)}(k) are the (trial) symbols according to a certain transition and ?(k) are the symbols that were previously decided.
Abstract: An arrangement and a method that, for a given pair of nodes that wish to intercommunicate with a high QoS measure, converts a portion of the contention-based network into a contention-less subnetwork by sending a reservation message and a confirmation message between the given pair of nodes. All nodes that are on the paths used for communicating between the pair of nodes are protected from interference by causing all nodes that potentially can interfere to enter a non-transmitting state.
Abstract: A method for measuring system response sensitivity, using live traffic and an analysis that converts randomly arriving stimuli and reactions to the stimuli to mean measures over chosen intervals, thereby creating periodically occurring samples that are processed. The system is perturbed in a chosen location of the system in a manner that is periodic with frequency p, and the system's response to arriving stimuli is measured at frequency p. The perturbation, illustratively, is with a square wave pattern.
Type:
Grant
Filed:
January 23, 2009
Date of Patent:
December 6, 2011
Inventors:
Shuyi Chen, William Sanders, Matti Hiltunen, Kaustubb Joshi, Richard Schlichting
Abstract: A receiver that receives a plurality of signals that are modulated with a common carrier, where each signal of said signals originates at a different source and experiences a transit delay and Doppler frequency shift before reaching the receiver, and where the transit delay and Doppler frequency shift are related to position and movement of each of the respective sources. The receiver includes means, such as a directional antenna, to ensure that the received signals are bona fide, or at least not subject to the same bogus signal or signals to which a second receiver may be subjected.
Type:
Grant
Filed:
February 2, 2008
Date of Patent:
November 29, 2011
Assignee:
Zanio, Inc.
Inventors:
Peter Levin, David S. De Lorenzo, Per K. Enge, Sherman C. Lo
Abstract: Authentication of a signal, signalA, that is provided as having been received from a source at a first global location by comparing it to a signal that is received from the source at a second global location, signalB, where signalB contains an unknown signal that is unique to the source, and determining that signalA contains the same unknown signal that is contained in signalB.
Type:
Grant
Filed:
February 2, 2008
Date of Patent:
November 29, 2011
Inventors:
Peter Levin, David S. De Lorenzo, Per K. Enge, Sherman C. Lo
Abstract: A method that accepts a data file, iteratively tests different information units as record delimiters and field delimiters, and chooses as the data files record delimiter, R, and field delimiter, F, the information units that result in the lowest generalized entropy that is computed on fields created by use of the chosen delimiter pair R,F.
Abstract: An improved (N:K) multiple description binning encoder that employs binning yet permits recovery of the input signal when fewer than K of the descriptions are available. In creating the encoder, a first choice is made of the number of descriptions that the encoder is to create and the minimum number of descriptions below which full recovery of the input signal is not possible. A second choice is made as to the number of descriptions that are to be broken up, to form descriptions that have two portions each. Once the first choice is made, appropriate quantization and binning scheme are selected by employing conventional techniques, and in response to the second choice, the chosen number of descriptions are each quantization split into coarse and fine quantization arrangements.
Abstract: In applications where data is transmitted in frames of symbols and the transmission medium is such that the probability of correct reception of symbols is, on the average, not uniform for different symbols in a frame, transmission of test frames enables creation of information about the different probabilities of correct reception, and that information is employed by the transmitter to control the manner in which symbols are transmitted so as to ameliorate the effects of the different probabilities of correct reception.
Type:
Grant
Filed:
May 9, 2008
Date of Patent:
May 10, 2011
Inventors:
Lusheng Ji, Samrat Bhattacharjee, Bo Han, Seungjoon Lee, Robert Miller
Abstract: A transport protocol that achieves improved performance in an environment where paths are lossy and a plurality of paths are employed to transfer data, essentially in parallel, from a source to a destination. The protocol is implemented with the aid of an aggregate flow manager (AFM) at the source that considers and controls the data flow through the plurality of paths. With some preselected regularity the AFM determines a number of packets to be included in a Forward Error Correction (FEC) block of packets, creates the block, and transmits the segments of the block over the plurality of paths. As necessary, the destination sends information to the source of what additional information needs to be sent. This additional information might be reactive error correcting (RFEC) packets, or a retransmission of the missed packets.
Abstract: A RAID 6 system, which has two strips to hold redundant data, employs a memory array controller that at each “read” operation considers not just the data but also the redundant information, even in the absence of any indication from the collection of memory controllers associated with the hard drives that any error condition exists. Thus, with each “read” operation the array controller checks the data for an unreported error, and takes corrective action when an error condition is discovered.
Abstract: The invention concerns a method and apparatus for performing packet loss or Frame Erasure Concealment (FEC) for a speech coder that does not have a built-in or standard FEC process. A receiver with a decoder receives encoded frames of compressed speech information transmitted from an encoder. A lost frame detector at the receiver determines if an encoded frame has been lost or corrupted in transmission, or erased. If the encoded frame is not erased, the encoded frame is decoded by a decoder and a temporary memory is updated with the decoder's output. A predetermined delay period is applied and the audio frame is then output. If the lost frame detector determines that the encoded frame is erased, a FEC module applies a frame concealment process to the signal. The FEC processing produces natural sounding synthetic speech for the erased frames.
Abstract: The invention concerns a method and apparatus for performing packet loss or Frame Erasure Concealment (FEC) for a speech coder that does not have a built-in or standard FEC process. A receiver with a decoder receives encoded frames of compressed speech information transmitted from an encoder. A lost frame detector at the receiver determines if an encoded frame has been lost or corrupted in transmission, or erased. If the encoded frame is not erased, the encoded frame is decoded by a decoder and a temporary memory is updated with the decoder's output. A predetermined delay period is applied and the audio frame is then output. If the lost frame detector determines that the encoded frame is erased, a FEC module applies a frame concealment process to the signal. The FEC processing produces natural sounding synthetic speech for the erased frames.
Abstract: Input signals of each frame are encoded by mapping the signals onto a coordinate system dictated by the symbols of the previous frame, and symbols from a constellation are selected based on the results of such mapping. Received signals are detected by preprocessing the signals detected at each antenna with signals detected by the antenna at the immediately previous frame, and then applied to a maximum likelihood detector circuit, followed by an inverse mapping circuit.
Abstract: A least-cost path between a pair of nodes A and B of a network is realized by segmenting the network into three or more segments, with nodes A and B being in different ones of the segments, with the third or more other segments being interposed between the segments to which nodes A and B belong, concurrently process the different segment to identify paths and their associated costs, and processing results generated by the different processing units to compute the least-cost path. Advantageously, the segmenting is chosen to equalize the work load of the different processing units so that the units finish their task roughly at the same time.
Abstract: A method that employs a piecewise linear algorithm, P, to map m-dimensional symbols into code tuples, followed by the construction of codes of weight m from the code tuples. To reverse the operation, constant weight codes are converted to code tuples, and a reverse piecewise linear algorithm P? is used to map the code tuples into symbols, from which data is recovered. The m-dimensional symbols are obtained from mapping of input data into the symbols, which are contained within an m-dimensional parallelopiped, with each coordinate having a different span but the symbols along each of the coordinate are equally spaced apart. The code tuples, which are obtained by employing process P, are contained within an m-dimensional simplex.
Type:
Grant
Filed:
June 7, 2006
Date of Patent:
September 8, 2009
Inventors:
Neil James Alexander Sloane, Chao Tian, Vinay Anant Vaishampayan
Abstract: A non-uniform filter bank is created by joining sections of oversampled uniform filter bands that are based on complex exponential modulation (as opposed to cosine modulation). Each filter bank handles a given, non-overlapping frequency band. The bands are not of uniform bandwidth, and the filters of different banks have different bandwidths. The frequency bands of the different filter banks cover the frequency of interest with gaps in the neighborhoods of the filter band edges. A set of transition filters fills those gaps.
Abstract: In an arrangement where the device that is known to an ISP is communicating with the ISP through an interposed device that is not known to the ISP, the interposed device captures the known device's MAC address upon startup and clones the captured MAC address in all standard packets that it sends to the ISP.
Type:
Grant
Filed:
January 12, 2005
Date of Patent:
March 11, 2008
Assignee:
AT&T Corp.
Inventors:
Ali Cherchali, Marius J. Gudelis, Jr., William G. Lester, Robert J. McLaughlin
Abstract: Serial assertion checking is realized in a System On a Chip (SoC) device by connecting scan chain output to a bit extractor configured within a functionally reconfigurable module that is part of the SoC, which extracts the bits necessary for the assertion checking. The extracted bits are applied to a finite state machine that implements the assertion checking.
Type:
Grant
Filed:
February 4, 2005
Date of Patent:
December 4, 2007
Assignee:
DAFCA, Inc.
Inventors:
Miron Abramovici, Gerard Philippe Memmi
Abstract: When, in the course of an integrated circuit's functional test an assertion fires at clock k, the operational clock is stopped, the sequence is reapplied to capture inputs to the assertion circuit that fired, signals within the assertion circuit are computed, and the error is backtraced. Once one or more inputs of the assertion circuit are identified as potentially the source of the error, the process of backtracing is performed for each such input. When the input that is potentially the source of the error emanates from a memory circuit, the fanin cone of the memory circuit is identified and the process of backtracing through the last-identified fanin cone is undertaken for clock k?1. This is repeated iteratively until either a module of the integrated circuit is found to be the source of the error, or the error is extended to inputs of the SoC.