Abstract: Alignment difficulties in optical computing arrangements are overcome by integrating the optical components on a single substrate and arranging the elements in a manner that causes them to interact with one another to perform the desired function. The substrate has one or two major surfaces and the elements are grown or fabricated on those surfaces using conventional integrated circuit manufacturing techniques. Most advantageously, the position-sensitive optical devices are manufactured on one side. Reflective planar optical devices are obtained by applying a reflective layer over the fabricated planar optical devices.

Abstract: A potential transmission-access failing in the IEEE 802.6 protocol is remedied by the use of terminals that sense the activity level on the interconnecting communications lines. In response to conditions that may give rise to such a failing, each terminal throttles its own transmission rate to improve the transmission capacity allocation of the protocol. In one embodiment, the terminal that transmits over more than half of the slots in the round trip delay simply throttles itself to one half the slots when it detects that another terminal is transmitting or is wishing to transmit. In another embodiment, even a terminal that is transmitting over fewer than half the slots in the round trip delay determines the number of unoccupied slots and throttles itself to transmit over not more than half of the number of available slots. In still another embodiment, a terminal wishing to transmit many packets casts a number of reservation bits onto the transmission channel to insure for itself some transmission capacity.

Abstract: In a programmable protocol engine, a core central processor implements a plurality of programmable finite state machines that perform context-dependent operations, and programmable satellite processing units that perform context-free operations. To assist in buffering the two way communications of the protocol engine, a memory is included which interacts with the central processor and the satellite units. The programmability of the protocol engine is achieved by realizing the satellite units with combinations of a processing unit and a memory unit which stores the instructions to be performed by the corresponding processing unit. The sequence of instructions to be performed is drawn from a small unique set of instructions which are adapted particularly to the tasks associated with protocol implementations. Instruction ports are provided for loading the necessary instructions to the satellite units and the central processor, thereby implementing a chosen protocol.

Abstract: A high definition television system that is characterized by low transmission bandwidth is achieved by removing redundancies in the signal, encoding the remaining signals, and transmitting the encoded signal in a manner that is most compatible with the applicable standards. In the encoding, groups of signals to be sent are mapped to codebook vectors and the identities of the codebook vectors are sent together with those signals of the groups of signals that correspond to the codebook vectors. To insure that the total number of signals that are sent does not exceed the available capacity, the signals are sorted by a selected importance parameter and assigned for transmission in descending order of importance until the capacity is exhausted. Signals that are not assigned for transmission are discarded.

Abstract: A vector codebook with an ordered set of vector entries that satisfy a prearranged continuity requirement is used to encode signals. The continuity requirement specifies that consecutively considered vectors may not differ from each other by more than k elements, where k is less than the number of elements in the vectors. In one embodiment, two memories are maintained. One for determining the best codebook vector selection, and one for quantizing the input signal in accordance with the selected vector. Recognizing the possibility that the best ordering possible for a given set of codebook vectors can not satisfy the continuity requirement, the vector codebook arrangement of this invention is enlarged in such a case to include additional vectors that are interposed in the sequence of vectors and arranged to maintain the continuity requirement.

Abstract: An arrangement for butt coupling of waveguide electrooptic plates to form a crossbar switch. The arrangement includes a stack of M splitter plates, each of which routes an injected optical signal to one of N outputs, and a stack of N combiner plates, each of which routes the signal of a selected one of M inputs to a common output. The stack of splitter plates is rotated with respect to the stack of combiner plates and the output signal ports of the splitter plates are coupled to the input signal ports of the combiner plates, so that each output of an splitter plate is connected to a different combiner plate. Within each splitter plate there is a fan-out network of waveguide electrooptic couplers and each coupler, under electric control, routes signals from one input to either one of two outputs. With j levels of such interconnected couplers 2.sup.j output are developed. The combiner plates have an identical architecture but with a signal flow in the reverse direction.

Abstract: A facsimile optical apparatus that comprises an optical head includes planar integrated optics. The head is fabricated with planar reflective lenses situated to focus light onto an image surface, and an array of planar reflective lenses to focus light reflected off the image surface onto an array of light detectors. Optionally, the light generating and the light detecting elements are fabricated on the substrate containing the planar reflective lenses, resulting thereby in a very compact arrangement. When image lines need to be accepted that are larger than the size of arrays that can economically be fabricated on a single substrate, integrated aligning means are provided to couple a number of substrates to each other and to form thereby a larger working element.

Abstract: Alignment difficulties in optical computing arrangements are overcome by integrating a number of the optical components on a single substrate and arranging the elements in a manner that causes them to interact with one another to perform the desired functions, such as image manipulations. the substrate has one or two major surfaces and the elements are fabricated on those surfaces using conventional integrated circuit manufacturing techniques. Most advantageously, the position-sensitive optical device are manufactured on one side of the substrate, obviating the need to align two masks during the manufacturing process.

Abstract: Alignment difficulties in optical computing arrangements are overcome by integrating the optical components on a single substrate and arranging the elements in a manner that causes them to interact with one another to perform the desired function. The substrate has one or two major surfaces and the elements are grown or fabricated on those surfaces using conventional integrated circuit manufacturing techniques. Recognizing that an optical circuit can be larger than what can be fabricated on a single substrate, aligning structures are fabricated onto substrates that need to be coupled to form the optical circuit. The aligning structures contain registrable protrusion and indentation portions, such as ridges and grooves, that are imbedded into the substrates as part of the manufacturing process of the optical elements. Most advantageously, the position-sensitive optical devices are manufactured on one side.

Abstract: Motion digital video is encoded and decoded by a motion compensated interpolation method and apparatus. In accordance with the method, selected frames of the video are interpolated in the decoder with the aid of interpolation correction codes that are generated in the encoder and sent to the decoder. In an encoder embodiment that interpolates half of the frames, every other frame is encoded and decoded within the encoder. The decoded versions of adjacent frames are appropriately combined and compared to the interleaved camera frame that is to be interpolated in the decoder. The differences, which correspond to "pels correction" information, are encoded and quantized. Those that exceed a predetermined threshold value are added to the encoder's output buffer. The inverse operation is carried out in the decoder. That is every pair of decoded frames is averaged and combined with the decoded "pels correction" information to form the interpolated frames.

Abstract: A system for reducing image data redundancies through progressive sub-band coding. The image is separated into a selected plurality of sub-bands, and the sub-band with the largest non-redundant data content is chosen and used to predict the data in the other sub-bands. Only prediction error information of the predicted sub-bands encoded and transmitted together with the encoded chosen sub-band. An overall performance error signal can also be evaluated at the encoder's end and used to further improve performance. The sub-band encoding can be performed recursively to still further reduce the encoded data.

Abstract: A processor architecture that permits the realization of any computing function with a regular array of interconnected procssing elements comprising as few as one processing element. The processing element can be as complex as desired. In its minimum form it can be as simple as a NOR gate and switch coupled with some delay elements, with the connectivity and the control signals combining to impart the flexiblity. In use, an algorithm to be implemented is conceptually mapped onto an array of processing elements arranged in rows and columns, where the data dependencies in the columns are unidirectional, and the data dependencies in the rows of processing elements are at most unidirectional. One or more actual processing elements are conceptually scanned over the array through time multiplexed controls to emulate the entire conceptual array and thus perform the algorithm.

Abstract: Apparatus that solves the problem of pattern recognition in a temporal signal that is subject to distortions and time warp. The arrangement embodying the invention comprises a neural network, an input interconnection network, and a plurality of signal modification circuits. A plurality of input leads delivers a preselected characteristic stimulus to associated signal modification units, and in response to an applied stimulus, each signal modification unit develops a plurality of output signals that begins at the time of stimulus application, rises to a peak, and decays thereafter. The mean time delay of each output (time to reach the peak) is different for each of the modification unit output signals. The outputs of the signal modification units are applied to the input interconnection unit wherein connections are made in accordance with the sequences that are to be recognized.

Abstract: An optical arrangement permutes elements of a multi-dimensional array by projecting an input element array onto an output via a plurality of optical paths. Each optical path provides a relative shift in its projection on the output plane whereby there is a prescribed permutation of elements.

Abstract: A method and apparatus for creating a transitive closure of a database when the database is stored on a secondary storage in the form of links connecting nodes. The method consists of partitioning the database, transferring one partition at a time from the secondary storage to the main memory, and processing a partition in such a way that accesses to the portions of the database not in main memory are minimized. As much of the unprocessed database as would fit a predetermined fraction of main memory is fetched as one partition, and if, during the processing of this partition, the main memory becomes full, the size of the partition is reduced dynamically by discarding a portion of the database in the current partition, and including this portion in the next partition. The processing of a partition involves, for each node in the partition, the operation of creating a direct connection between every pair of nodes that are indirectly connected through this node.

Abstract: A method and apparatus for optimizing resource allocations is disclosed which utilizes the Karmarkar algorithm to proceed in the interior of the solution space polytope. The values of the allocation variables are limited by upper and lower bounds, either individually or collectively with the same common bound. Each successive approximation of the solution point, and the polytope, are normalized such that the solution point is at the center of the normalized polytope using a diagonal matrix of the current solution point. The objective function is then projected into the normalized space and the next step is taken in the interior of the polytope, in the direction of steepest-descent of the objective function gradient and of such a magnitude as to remain within the interior of the polytope. The process is repeated until the optimum solution is closely approximated.

Abstract: A crossover network is obtained by using a plurality of similar optical crossover stages. Each stage includes two light paths that combine at an output plane. One path provides the direct connection while the other path provides the crossover connection. To realize this crossover capability, each stage comprises a beam splitter element that accepts a beam containing an image array and develops therefrom two beams that are each directed in two different paths. Along one path, means are provided for reversal of selected segments of the image array and for sending of the reversed or crossed-over image through a beam combiner. Along the second path, means are provided for applying the light to a beam combiner without the image reversal. One disclosed means for image reversal is a prismatic mirror. The number of corners in such a mirror differs from stage to stage.

Abstract: Method and apparatus for optimizing the operational state of a system employing iterative steps that approximately follow a projective scaling trajectory or an affine scaling trajectory, or curve, in computing from its present state, x.sub.0 to a next state x.sub.1 toward the optimum state. The movement is made in a transformed space where the present (transformed) state of the system is at the center of the space, and the curve approximation is in the form of a power series in the step size. The process thus develops a sequence of tentative states x.sub.1, x.sub.2, x.sub.n . . . . It halts when a selected suitable stopping criterion is satisfied, and assigns the most recent tentative state as the optimized operating state of the system.

Abstract: Apparatus and method for efficient multiplication of a matrix by a vector. The multiplication is realized by rearranging the matrix so that a plurality of adjacent columns form a set, and each set is characterized by a certain pattern in each column. One set contains columns of only a single .+-.1 entry, another set contains columns with two .+-.1 entries, and still another set contains columns with entries that are other than .+-.1. Each of the sets is treated differently during the calculations in accordance with a maximal * cover approach, and a result is developed by multiplying each row in the rearranged matrix by a corresponding element of the vector to form partial results, and accumulating the partial results.

Abstract: A discrete event simulation system that avoids all blocking and advances the simulation time in an efficient manner by treating the simulated system as a set of subsystems and simulating the subsystems concurrently. The simulation proceeds iteratively by restricting the simulation of scheduled events for each subsystem at any one time to a chosen simulated time segment (bounded lag) beginning with the lowest simulation time found among the subsystems. With each simulation iteration, an "at risk", demarcation time is evaluated based only on a subset of the subsystems that can potentially affect the simulation at the considered subsystem. Events scheduled for a time earlier than the "at risk" time are simulated.