Patents Represented by Attorney Hitachi America, Ltd.
  • Patent number: 7970986
    Abstract: A storage system using flash memories includes a storage controller and plural flash memory modules as storage media. Each flash memory module includes at least one flash memory chip and a memory controller for leveling erase counts of blocks belonging to the flash memory chip. The storage controller combines the plural flash memory modules into a first logical group, translates a first address used for accessing the flash memory modules belonging to the first logical group to a second address used for handling the first address in the storage controller, and combines the plural first logical groups into a second logical group.
    Type: Grant
    Filed: April 22, 2010
    Date of Patent: June 28, 2011
    Assignee: Hitachi, Ltd.
    Inventors: Katsuya Tanaka, Kentaro Shimada
  • Patent number: 7925832
    Abstract: A host computer HA1 or the like is provided with a target program 3 that receives the provision of logical volumes 212, a volume interface program 12A that provides an interface for the logical volumes 212 to the target program 3, and a volume filter program 12B that selects one logical volume from the copying source volume 212A and copying destination volume 212B, and provides the selected logical volume to the target program 3 via the volume interface program 12A.
    Type: Grant
    Filed: May 20, 2009
    Date of Patent: April 12, 2011
    Assignee: Hitachi, Ltd.
    Inventor: Kenichi Miki
  • Patent number: 7908408
    Abstract: The present invention provides a storage device and a control method thereof which can enhance general-use property and availability of a storage system while enhancing I/O performance of the storage system as a whole. The storage device is provided with an external connection function in which a command is generated in response to a read request or a write request given by a host computer, and the generated command is issued to an external storage device via any of a plurality of ports. In such a storage device, a channel processor, for every kind of the command, issues a test command to the external storage device in a plurality of issuing methods, measures an I/O performance for every issuing method, displays a result of measurement of the I/O performance for every method, and/or sets the issuing method in issuing the command to the external storage device based on the result of measurement of the I/O performance for every issuing method.
    Type: Grant
    Filed: September 24, 2008
    Date of Patent: March 15, 2011
    Assignee: Hitachi, Ltd.
    Inventor: Taiki Kono
  • Patent number: 7827193
    Abstract: The file sharing system of the present invention selects a suitable data migration method that corresponds with the usage status and transfers data efficiently. A virtual volume and a migration source volume which is the migration target volume are associated by means of an external connection control section. When an instruction for volume migration is issued, the usage percentage judgment section compares the usage percentage of the migration source volume with a designated threshold value. When the usage percentage is equal to or more than the threshold value, volume copying is selected. The volume copy section copies data at the block level from the virtual volume to the migration destination volume. When the usage percentage is less than the threshold value, file copying is selected. The file copy section reads files stored in the migration source volume via the host and writes the files to the migration destination volume.
    Type: Grant
    Filed: January 25, 2007
    Date of Patent: November 2, 2010
    Assignee: Hitachi, Ltd.
    Inventor: Daigo Chiba
  • Patent number: 7827269
    Abstract: A computer is provided with: a device related value acquisition unit that acquires a device related value (for example a LUN), which is a value relating to a device; a calculation formula including a first variable in which the device related value is substituted; a device identification value calculation unit that calculates a device identification value of a device corresponding to the acquired device related value by substituting this device related value in the first variable; and a correspondence registration unit that registers the calculated device identification value and the acquired device related value in an electronic information resource.
    Type: Grant
    Filed: January 14, 2008
    Date of Patent: November 2, 2010
    Assignee: Hitachi, Ltd.
    Inventors: Tomoya Anzai, Takahiro Nakano
  • Patent number: 7825799
    Abstract: An object of the invention is to render replacement of controllers for identifying failure information unnecessary. Failure monitor units 24 and 26 in power supplies 10 and 12 are connected mutually via paths 38 and 40, the failure monitor units 24 and 26 in the power supplies 10 and 12 are connected to failure monitor units 30 and 32 in controllers 14 and 16 via paths 34 and 36, and LEDs 1 and 2 are connected to paths 34 and 36. The failure monitor unit 24 transfers, when a failure occurs in the power supply 10, failure information to the failure monitor unit 26 in the power supply 12 via the path 38. The LED 1 is lit by both the failure monitor units 24 and 26. The failure monitor units 24 and 26 transfer failure information indicating failure occurrence in the power supply 10 to the failure monitor units 30 and 32 in controllers 14 and 16 via a path 34. The failure monitor units 30 and 32 notify a maintenance PC of the failure occurrence in the power supply 10.
    Type: Grant
    Filed: December 6, 2006
    Date of Patent: November 2, 2010
    Assignee: Hitachi, Ltd.
    Inventors: Hideaki Takahashi, Manabu Yamagata
  • Patent number: 7809907
    Abstract: When detecting the completion of remote copying of a primary volume to a secondary volume, a host computer splits a copy pair into the primary volume and the secondary volume and has the secondary volume store a snapshot of the primary volume. A backup server recognizes the secondary volume.
    Type: Grant
    Filed: September 21, 2006
    Date of Patent: October 5, 2010
    Assignee: Hitachi, Ltd.
    Inventors: Ikuo Uratani, Kiichiro Urabe
  • Patent number: 7807496
    Abstract: To provide a method of easily producing TFT in which the orientation of channel molecules or wires is enhanced, compared with conventional type organic TFT at a low price, a lyophilic TFT pattern encircled by a lyophobic area is formed on a substrate, spontaneous movement is made in a droplet containing organic molecules or nanowires dropped in a channel region by characterizing the form of the pattern, and the organic molecules or the nanowires are oriented in the channel region by the movement.
    Type: Grant
    Filed: August 2, 2005
    Date of Patent: October 5, 2010
    Assignee: Hitachi, Ltd.
    Inventors: Masaaki Fujimori, Tomihiro Hashizume, Masahiko Ando
  • Patent number: 7793057
    Abstract: The device of the present invention manages changes in the construction of a storage system in a unified manner, and optimally disposes resources. The servers are logically divided into a plurality of virtual servers, the switches are logically divided into a plurality of zones, and the storage devices are logically divided into a plurality of virtual storage devices. The respective logical devices are respectively managed by respective managing parts. These respective managing parts are connected to a managing device via a network used for management. The managing device re-disposes resources in application program units on the basis of the load states of the respective resources in the storage system.
    Type: Grant
    Filed: July 10, 2008
    Date of Patent: September 7, 2010
    Assignee: Hitachi, Ltd.
    Inventors: Kenichi Miki, Eiichi Sato
  • Patent number: 7761561
    Abstract: A sensor node may be used for another purpose for a moment and may also be replaced. By configuring, for a sensor node, a logic node which is provided with the physical node use information indicating whether or not the sensor node is in use and the logical node use information indicating whether or not the sensor node is provided as a logic node, a sensor node to be replaced may be specified based on the replacement request of the sensor node, a sensor node is selected which is configured as logic node providing the physical node use information indicating that the sensor node is not used and the logic node use information indicating that the sensor node is provided as the logic node, thus selected sensor node is identified as the replacing sensor node to achieve the replacement from the replaced sensor node to the replacing sensor node.
    Type: Grant
    Filed: July 13, 2007
    Date of Patent: July 20, 2010
    Inventors: Keiro Muro, Toshiyuki Odaka, Minoru Ogushi, Kei Suzuki, Shoji Suzuki, Kazuki Watanabe
  • Patent number: 7743211
    Abstract: A storage system 1 includes: plural protocol transformation units 10 that transform, to a protocol within the system, a read/write protocol of data exchanged with servers 3 or hard disk groups 2; plural cache control units 21 that include cache memory units 111 storing data read/written with the servers 3 or the hard disk groups 2 and which include the function of controlling the cache memory units 111; and an interconnection network 31 that connects the protocol transformation units 10 and the cache control units 21. In this storage system 1, the plural cache control units 21 are divided into plural control clusters 70, control of the cache memory units 111 is independent inside the control clusters, and a system management unit 60 that manages, as a single system, the plural protocol transformation units 10 and the plural control clusters 70 is connected to the interconnection network 30.
    Type: Grant
    Filed: June 20, 2008
    Date of Patent: June 22, 2010
    Inventors: Kazuhisa Fujimoto, Mutsumi Hosoya, Kentaro Shimada, Akira Yamamoto, Naoko Iwami, Yasutomo Yamamoto
  • Patent number: 7734865
    Abstract: A storage system using flash memories includes a storage controller and plural flash memory modules as storage media. Each flash memory module includes at least one flash memory chip and a memory controller for leveling erase counts of blocks belonging to the flash memory chip. The storage controller combines the plural flash memory modules into a first logical group, translates a first address used for accessing the flash memory modules belonging to the first logical group to a second address used for handling the first address in the storage controller, and combines the plural first logical groups into a second logical group.
    Type: Grant
    Filed: July 2, 2008
    Date of Patent: June 8, 2010
    Assignee: Hitachi, Ltd.
    Inventors: Katsuya Tanaka, Kentaro Shimada
  • Patent number: 7045936
    Abstract: An improved coupler with contrast ribs for use in a projection system. The coupler supports a projection lens in alignment with a projection optical signal generation device (e.g., a Cathode Ray Tube). The contrast ribs minimize contrast distortion that occurs in the coupler. The coupler defines a cooling chamber between said projection lens and said projection signal generating device and is filled with liquid in order to transport the optical signal between the projection optical signal generation device and projection lens. The contrast ribs change the angle of reflection of stray light rays generated by the projection optical signal generation device and direct a portion of those stray light rays to other contrast ribs. The ribs are preferably coated with a chemical composition that helps allow the ribs to absorb a portion of each ray incident on the rib.
    Type: Grant
    Filed: September 5, 2003
    Date of Patent: May 16, 2006
    Assignee: Hitachi Electronic Devices (USA), Inc.
    Inventor: Scott Howland Baker
  • Patent number: 6871962
    Abstract: A one piece, double gland, quad lobe design gasket system for use in a projection system that redundantly seals in the liquid present in a coupler supporting a projection lens in alignment with a projection optical signal generation device (e.g., a Cathode Ray Tube). The coupler defines a cooling chamber between said projection lens and said projection signal generating device and is filled with liquid in order to transport the optical signal between the projection optical signal generation device and projection lens while minimizing contrast distortion. In order to prevent leaking from the cooling chamber between the coupler and projection signal generation device, an improved sealing system is used by providing two separate channels in the coupler and using the integral double gland, quad lobe gasket. Each gland is placed in a corresponding groove in the coupler thus creating two separate lines of seal that keeps the liquid in the coupler from leaking out.
    Type: Grant
    Filed: September 5, 2003
    Date of Patent: March 29, 2005
    Assignee: Hitachi Electronic Devices, Inc.
    Inventor: Jeffrey Scott Kane