Abstract: A method and computer program product for performing a latency analysis to determine one or more latency statistics for one or more network links within a distributed computing network. The one or more latency statistics are compared to one or more benchmark latency criteria to determine if at least one of the network links is a latency-compatible network link. If at least one of the network links is a latency-compatible network link, at least one additional network analysis is performed on at least one of the latency-compatible network links.

Abstract: A new technique for identifying from images a camera, or other imaging device such as a scanner, is based on the device's reference noise pattern, a unique stochastic characteristic of all common digital imaging sensors, including CCD, CMOS (Foveon™ X3), and JFET. First, one determines from images the sensor's reference pattern noise, which uniquely identifies each sensor. To identify the sensor from a given image, the presence or absence of the reference pattern noise in the image under examination is established using a correlation detector or other means.

Abstract: The present invention provides a method and apparatus for the production and labeling of objects in a manner suitable for the prevention and detection of counterfeiting. Thus, the system incorporates a variety of features that make unauthorized reproduction difficult. In addition, the present invention provides an efficient means for the production of labels and verification of authenticity, whereby a recording apparatus which includes a recording medium, having anisotrophic optical domains, along with a means for transferring a portion of the recording medium to a carrier, wherein a bulk portion of the recording medium has macroscopically detectable anisotrophic optical properties and the detecting apparatus thereon.

Abstract: A programmable phase shifter is constructed of Rapid Single Flux Quantum (RSFQ) logic elements. The logic elements may include an RSFQ inverter and an RSFQ T flip-flop. A digital word comprising N bits is used to control the amount of phase shift and the phase shifter selectively imparts a respective phase shift for any of 2N states that can be represented by the digital word. The RSFQ logic elements utilize Josephson junctions which operate in the superconducting temperature domain.

Abstract: A support panel for thin brick, comprising a metal sheet, an array of groove retaining tabs having first tab edges, said first tab edges protruding from said sheet having at an upward angle of less than about 45 degrees, for a distance of less than about one quarter inch, and an array of mortar lock tabs having second tab edges, said second tab edges protruding from said sheet at a downward angle of greater than about 45 degrees, said array of mortar lock tabs being offset vertically from said array of groove retaining tabs, wherein, said array of groove retaining tabs are adapted to engage shallow dovetail grooves formed in the rear of thin bricks, and said mortar lock tabs are adapted, when embedded within a cured mortar matrix, to exert, in response to a tensile force away from said metal sheet, a force along a vertical axis, on the brick, in an opposite direction to a force applied to the brick along a vertical axis by said groove retaining tab, to thereby retain the brick against the panel.

Abstract: Data overhead of mesh-based multicast ad hoc routing protocols are controlled by adaptively adding redundancy to the minimal data overhead multicast mesh as required by the network conditions. The computation of the minimal data overhead multicast mesh is NP-complete, and therefore an heuristic approximation algorithm inspired on epidemic algorithms is employed to increase tractability of a solution. A mobility-aware and adaptive mesh construction algorithm based on a probabilistic path selection is provided, which is able to adapt the reliability of the multicast mesh to the mobility of the network. Simulation results show that the proposed approach, when implemented into On-Demand Multicast Routing Protocol (ODMRP), is able to offer similar performance results and a lower average latency, while reducing data overhead between 25 to 50% compared to the original ODMRP.

Abstract: A light guide adapter for a camera stroboscopic illuminator, comprising a removable mounting adapted to adhere to an unmodified on-camera stroboscopic illuminator; and at least one flexible light guide, connected to the mounting, having an entrance aperture positioned to receive light from the stroboscopic illuminator, each light guide having a self-supporting, independently positionable exit aperture distal from the entrance aperture.

Abstract: A light adapted to be attached to an article of clothing, comprising a power supply casing, an illuminator casing, having therein an illuminator adapted to emit a beam of light when electrically powered, said power supply casing and illuminator casing being attachable and detachable to the article of clothing means of a clamping force applied by a clamp with at least one extension, said at least one extension providing mechanical interconnection and a clamping force between the light and the article of clothing to retain the article of clothing therebetween.

Abstract: As circuit sizes have increased, designs have become increasingly hierarchical. It is common for designs to have large numbers of macro blocks; many of these blocks are “soft,” and may have variable width and height. The present invention provides an alternate method to handle designs with large numbers of blocks. Rather than approaching them as expanded floorplanning, the problems are re-cast as traditional mixed size placement, and many macro blocks are treated as standard cells. Using existing mixed size placement tools, the superior reported are obtained. First, an effective “standard block design” methodology is provided. Second, new mixed size placement legalization algorithms that are more robust than the widely-used mixed-size Tetris algorithm is presented.

Abstract: Digital mixers which permit mixing of asynchronous signals are constructed of Rapid Single Flux Quantum (RSFQ) logic elements. The logic elements may include an RSFQ non-destructive readout cell (NDRO), an RSFQ D flip-flop, an RSFQ XOR circuit, and an RSFQ T flip-flop. A binary tree arrangement of T flip-flops can be used to provide in-phase and quadrature phase-divided replicas of a reference signal. The mixing elements can be either an XOR circuit, a dual port NDRO circuit functioning as a multiplexer or an RS type NDRO functioning as an AND gate. The RSFQ logic elements utilize Josephson junctions which operate in superconducting temperature domains.

Abstract: A communications management system comprising an input for receiving a communications classification; a database of skill weights with respect to the communications classification; a database of agent skill scores; and a processor, for computing, with respect to the received communication classification, an optimum agent selection, the processor directly controlling a routing of the information representing the received call.

Abstract: The need for a more readily usable interface for programmable devices is widely recognized. The present invention relates to programmable sequencing devices, or, more particularly, the remote controls for consumer electronic devices. The present invention provides an enhanced interface for facilitating human input of a desired control sequence in a programmable device by employing specialized visual feedback. The present invention also relates to a new interface and method of interfacing with a programmable device, which is usable as an interface for a programmable video cassette recorder.

Abstract: The present invention features additions of nano-structures to interconnect conductor fine particles (spheres) to: (1) reduce thermal interface resistance by using thermal interposers that have high thermal conductivity nano-structures at their surfaces; (2) improve the anisotropic conductive adhesive interconnection conductivity with microcircuit contact pads; and (3) allow lower compression forces to be applied during the microcircuit fabrication processes which then results in reduced deflection or circuit damage. When pressure is applied during fabrication to spread and compress anisotropic conductive adhesive and the matrix of interconnect particles and circuit conductors, the nano-structures mesh and compress into a more uniform connection than current technology provides, thereby eliminating voids, moisture and other contaminants, increasing the contact surfaces for better electrical and thermal conduction.

Abstract: A system and method for communicating between a signal generator and a signal receiver, for providing controlled access to information and/or communication channels, whereby the signal generator and the signal receiver are set to wirelessly transmit and receive a plurality of simultaneously transmitted signals, respectively, and the signal receiver is set to selectively provide access to information and/or communication channels on receiving the plurality of simultaneously transmitted signals from the signal generator, the signal generator comprising means for limiting a transmission of a predetermined signal to at least one of a prescribed duration and a prescribed number of activations for access to the information and/or communication channels.

Abstract: A new technique is presented for improving the microfabrication yield of Josephson junctions in superconducting integrated circuits. This is based on the use of a double-layer lithographic mask for partial anodization of the side-walls and base electrode of the junctions. The top layer of the mask is a resist material, and the bottom layer is a dielectric material chosen so as to a) maximize adhesion between the resist and the underlying superconducting layer, b) be etch-compatible with the underlying superconducting layer, and c) be insoluble in the resist and anodization processing chemistries. In a preferred embodiment of the invention, the superconductor is niobium, the material on top of this is silicon dioxide, and the top layer is conventional photoresist or electron-beam resist. The use of this combination results in a substantial increase in the fabrication yield of high-density superconducting integrated circuits due to increase in junction uniformity and reduction in defect density.

Abstract: A new technique for identifying whether images are derived from a common imager, e.g., a camera, or other imaging device such as a scanner, based on the device's measured or inferred reference noise pattern, a unique stochastic characteristic of all common digital imaging sensors, including CCD, CMOS (Foveon™ X3), and JFET. The measured or inferred noise pattern of two images may be extracted and then cross correlated, with a high correlation being consistent with a common imager. Various preprocessing techniques may be used to improve tolerance to various types of image transform. It is also possible to perform the analysis without explicit separation of inferred image and inferred noise.

Abstract: A light adapted to be attached to an article of clothing, comprising a power supply casing, an illuminator casing, having therein an illuminator adapted to emit a beam of light when electrically powered, said power supply casing and illuminator casing being attachable and detachable to the article of clothing through an aperture by means of at least one extension, said at least one extension providing mechanical interconnection and a clamping force between said internal casing and a clamp to retain the article of clothing therebetween.

Abstract: An intelligent control system based on an explicit model of cognitive development (Table 1) performs high-level functions. It comprises up to O hierarchically stacked neural networks, Nm, . . . , Nm+(O?1), where m denotes the stage/order tasks performed in the first neural network, Nm, and O denotes the highest stage/order tasks performed in the highest-level neural network. The type of processing actions performed in a network, Nm, corresponds to the complexity for stage/order m. Thus N1 performs tasks at the level corresponding to stage/order 1. N5 processes information at the level corresponding to stage/order 5. Stacked neural networks begin and end at any stage/order, but information must be processed by each stage in ascending order sequence. Stages/orders cannot be skipped. Each neural network in a stack may use different architectures, interconnections, algorithms, and training methods, depending on the stage/order of the neural network and the type of intelligent control system implemented.

Abstract: A refrigeration system comprising a compressor for compressing a refrigerant, a condenser for condensing refrigerant to a liquid, an evaporator for evaporating liquid refrigerant from the condenser to a gas, an inner control loop for optimizing a supply of liquid refrigerant to the evaporator, and an outer control loop for optimizing a level of refrigerant in the evaporator, said outer control loop defining a supply rate for said inner control loop based on an optimization including measurement of evaporator performance, and said inner control loop optimizing liquid refrigerant supply based on said defined supply rate. Independent variables, such as proportion of oil in refrigerant, amount of refrigerant, contaminants, non-condensibles, scale and other deposits on heat transfer surfaces, may be estimated or measured.