Patents Represented by Attorney, Agent or Law Firm Hogan & Harston, L.L.P.
  • Patent number: 6363465
    Abstract: A data transfer system including a system having successive stages connected in series. Each of the stages performs a partial operation necessary for transferring data in synchronism with a control clock, and the system transfers data by sequentially operating the stages and performs pipeline control to allow two or more stages to simultaneously transfer data. The data transfer system also includes a clock generating circuit that generates internal clock signals based on an external clock signal supplied to the system, and a clock switching circuit that selectively switches the external clock signal and the internal clock signals generated by the clock generating circuit to control the operation of each of the stages. In one embodiment, the clock generating circuit generates the internal clock signals based on a selected latency by sequentially delaying the external clock signal.
    Type: Grant
    Filed: May 21, 1997
    Date of Patent: March 26, 2002
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Haruki Toda
  • Patent number: 6350685
    Abstract: A semiconductor device is manufactured by a method including the steps of forming a through hole in an interlayer dielectric layer (silicon oxide layer, BPSG layer, etc.) formed on a semiconductor substrate having a device element. A barrier layer is formed on surfaces of the interlayer dielectric layer and the through hole. A wiring layer is formed on the barrier layer. The barrier layer is formed by a method including the following steps. A titanium layer that forms at least a part of the barrier layer is formed. A heat treatment is conducted in a nitrogen atmosphere to form a titanium nitride layer at least on a surface of the titanium layer. The titanium nitride layer is contacted with oxygen in an atmosphere including oxygen. A heat treatment is conducted in a nitrogen atmosphere to form titanium oxide layers and to densify the titanium nitride layer.
    Type: Grant
    Filed: October 5, 1999
    Date of Patent: February 26, 2002
    Assignee: Seiko Epson Corporation
    Inventors: Michio Asahina, Eiji Suzuki, Kazuki Matsumoto, Naohiro Moriya