Patents Represented by Attorney, Agent or Law Firm Hogan & Harstson, LLP
  • Semiconductor memory device
    Patent number: 6510087
    Abstract: A semiconductor memory device comprises a memory cell array, a first latch circuit group, and a second latch circuit group. The first latch circuit group sequentially outputs n/2 bit read data of n-bit read data from the memory cell array in response to sequentially shifted read control signals. The second latch circuit group sequentially outputs the remaining n/2 bit read data in response to the sequentially shifted read control signal.
    Type: Grant
    Filed: September 25, 2001
    Date of Patent: January 21, 2003
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Manami Kudou, Kazuhide Yoneya, Masaru Koyanagi, Toshiki Hisada, Katsuki Matsudera