Patents Represented by Attorney, Agent or Law Firm Hogan & Hartson, LL
  • Patent number: 6656766
    Abstract: A first surface of a semiconductor chip and an upper surface of a circuit board are bonded with a pad of the semiconductor chip fitted to a first opening of the circuit board. The pad is electrically connected to a wire of the circuit board. The pad is sealed with a first resin. A second resin is disposed on the upper surface of the circuit board. A second resin includes an upper surface at a height substantially equal to a height of a second surface of the semiconductor chip at a point apart from a corner of a square of the first surface of the semiconductor chip.
    Type: Grant
    Filed: January 7, 2003
    Date of Patent: December 2, 2003
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Kazuyuki Noshita