Abstract: The present invention provides an antenna system for reading RFID tags and/or transmitting and receiving wireless network signals, including for example wireless local area network (WLAN) signals, in a material handling environment. A ruggedized antenna can be mounted on the load backrest of a lift truck and configured to accomplish the reading of RFID tags that indicate particular pallet storage locations and the reading of RFID tags that indicate warehouse locations, such as specific loading docks. The antenna system can also be configured to accomplish transmitting and receiving WLAN signals for communication with a warehouse.

Abstract: A laminated piezoelectric device obtained by alternately laminating the piezoelectric layers containing Pb and the conducting layers containing palladium as a conducting component, wherein the piezoelectric layer formed between the two conducting layers has layer regions where Pb and Pd are mixed together in the interfacial portions thereof relative to the conducting layers, the layer regions having a thickness of not larger than 3% of the thickness of the piezoelectric layer. The laminated piezoelectric device is formed by co-firing the Pb-containing piezoelectric layers and the palladium (Pd)-containing layers, the piezoelectric layers therein having a large insulation resistance and good piezoelectric characteristics.

Abstract: A method of programming a radiation-hardened integrated circuit includes the steps of supplying a prototype device including an SRAM memory circuit or programmable key circuit to a customer, having the customer develop working data patterns in the field in the same manner as a reading and writing to a normal RAM memory, having the customer save the final debugged data pattern, delivering the data pattern to the factory, loading the customer-developed data pattern into memory, programming the customer-developed data pattern into a number of production circuits, irradiating the production circuits at a total dosage of between 300K and 1 Meg RAD to burn the data pattern into memory, and shipping the irradiated and programmed parts to the customer.

Abstract: A developer collection system comprises a plurality of image carrier members, a plurality of development sections for developing the electrostatic latent images formed respectively on the plurality of image carrier members by means of liquid developers of different colors containing a non-volatile solvent as carrier, an intermediate transfer member for sequentially transferring the developer images developed by the primary transfer sections respectively corresponding to the plurality of image carrier members, superposing them one on the other and carrying and conveying the developer images, an output section for transferring the superposed developer images from the intermediate transfer member onto a sheet on a sheet conveyance route in the secondary transfer section and developer collection means for collecting excessive developers from at least two of the plurality of image carrier members, the plurality of development means, the intermediate transfer member and the output section and at least two of the fl

Abstract: There is included: N (N?2) resonators formed by laminating a plurality of conductor patterns and dielectric layers alternately and arranged in an at least partially overlapped manner when viewed in the laminating direction to be coupled electromagnetically to each other; and input and output lines 3 and 4 coupled, respectively, to two resonators 1 and 2 selected among the N resonators, in which one end of each of the N resonators is grounded, and the length of each of the N resonators in the signal propagation direction is basically ?/4, where ? represents a propagation wavelength inside the dielectric layers at approximately the center frequency of the pass band. A wider pass bandwidth, size and loss reduction, and a large amount of attenuation within a narrow band can be achieved.

Abstract: A capacitor includes a base having a hollow or open portion in an upper surface for containing a battery element or an electric double layer capacitor element and an electrolytic solution in an inside thereof, a metallized layer formed to a periphery of the base defining the hollow or open portion in the upper surface and a frame member made of metal brazed to the metallized layer so as to surround the hollow or open portion. An inner lateral surface of the frame member is inclined outward, and a corrosion resistant layer is deposited so as to continuously cover the inclined surface and a portion of the surface of the metallized layer situated inward thereof.

Abstract: A switching regulator circuit includes a switching circuit that may be configured to alternately apply a supply voltage and a reference voltage to an inductor coupled between a first node and an output node. The switching regulator circuit also includes a switch such as a transistor, for example, that is coupled across the inductor. The switch may shunt the inductor when the current in the inductor reaches a predetermined current level.

Abstract: A symbol sequence in a received DS-CDMA signal is decoded in an efficient manner in order to reduce the processing needs in a receiver when, e.g., processing acquisition indicators (AI) in a UMTS system. The decoding comprises iterative calculation of a hard-decision vector, using a decision threshold having a value based on the probability of each ternary alphabet element of each symbol in the hard-decision vector.

Abstract: The present invention provides highly purified omega-3 fatty acid formulations. Certain formulations provided herein have contain greater than 85% omega-3 fatty acids by weight. Certain other formulations provided herein contain EPA and DHA in a ratio of from about 4.01:1 to about 5:1. The invention also provides methods of using the dosage forms to treat a variety of cardiovascular, autoimmune, inflammatory, and central nervous system disorders by administering a formulation of the invention to a patient in need thereof.

Abstract: The signal margin of a small array 2T/2C memory is increased by writing the ferroelectric load capacitors on the bit lines to complementary states.

Abstract: A motorcycle having a grab bar with sufficient attachment strength and rigidity, minimum wall thickness and size and no deterioration in external appearance. The grab bar has a grab section to be grabbed by a rider and attachment sections to be attached to left and right seat rails. The attachment sections extend through a space below a rear edge of a seat toward the front and are connected to the left and right seat rails.

Abstract: The present invention relates to a transconductance circuit intended to convert a differential input voltage, supplied as two signals to two inputs, IN+ and IN? respectively, into a differential output current. According to the invention, each of the two signals of said differential input voltage is supplied to each input, IN+ and IN? respectively, through a follower transistor, TF+ and TF? respectively, connected to said input, IN+ and IN? respectively, by its emitter and receiving said signal on a control electrode.

Abstract: A short-circuit charge-sharing technique which allows charge-sharing between two or more circuits with a simple shorting transistor controlled to achieve the desired operating voltage levels. The shorting transistor which can be either a P-channel Metal Oxide Semiconductor (PMOS) or an N-channel Metal Oxide Semiconductor (NMOS) device and can be controlled utilizing the same clock that enables the drive of the signals between which charge-sharing occurs. In operation, the desired operating voltage levels can be regulated by increasing and decreasing the pulse width of the control circuit output to the gate of the shorting transistor.

Abstract: An arbiter module receives two or more closely occurring asynchronous requests and provides an output with a low metastability failure probability. The arbiter module includes a request resolving module that receives multiple asynchronous requests for providing a final output. The request resolving module includes one or more arbiter stages cascaded with each other and operatively coupled with logic units.

Abstract: The invention is generally related to a polymer/liquid crystal composite, which includes a liquid crystal material which exhibits an optically isotropic liquid crystal phase in the temperature range of approximately 5° C. or more in the elevated temperature process but does not exhibit a nematic phase; and a polymer, and which is used for an element driven in a state of the optically isotropic liquid crystal phase.

Abstract: A spring member for disc-brake calipers is interposed between a lateral edge of at least one pad and reaction surfaces of the caliper so as to act resiliently on the pad. The spring member comprises a ‘U’-shaped portion suitable for forming a connection with a protuberance of the reaction surfaces, a first resilient portion suitable for acting on the pad in a tangential direction, and a second resilient portion suitable for acting on the pad in a radial direction. The first and second resilient portions constitute a single body projecting from a first connection end of the first resilient portion that is connected to the ‘U’-shaped portion, so that, when the at least one pad is in a mounted configuration, it is acted on resiliently by the spring member both in a radial direction and in a tangential direction.

Abstract: A liquid ejection method includes: (A) moving nozzles relative to a medium, (B) ejecting liquid from the nozzles while the nozzles are moving relative to the medium, (C) forming a first pattern on the medium with the liquid ejected from the nozzles at either one of a timing delayed from a certain reference timing by a predetermined interval and a timing preceding the certain reference timing by a predetermined interval while the nozzles are moving in a certain direction with respect to the medium, and (D) when the first pattern has been formed on the medium with the liquid ejected from the nozzles at the timing delayed by the predetermined interval, forming a second pattern on the medium with the liquid ejected from the nozzles at a timing delayed from the certain reference timing by an interval equal to the predetermined interval while the nozzles are moving in a direction opposite to the certain direction with respect to the medium, and when the first pattern has been formed on the medium with the liquid ej

Abstract: A driver program is provided for causing a host apparatus to execute a processing of generating color-converted image data and transferring it to a printing apparatus, this program making it possible to decrease the volume of image data to be stored in the host apparatus and to conduct data transfer without delaying the printing completion. A driver program causes a host apparatus to execute a processing of generating image data comprising data of a plurality of colors and transferring it to a printing apparatus. When the transfer of the image data of one plane is conducted, the driver program causes the host apparatus to execute a transfer processing conducted by intermingling a step of transferring by each band of the bands obtained by dividing the image data of one plane at the prescribed height, and a step of transferring by each color of the plurality of colors.

Abstract: It is an object of the present invention to provide an electrostatic chuck which has a good separation response and scarcely causes gas leakage while keeping the uniformly heating property and high attracting capability for a substrate and a treatment apparatus using the chuck.

Abstract: An ECC circuit (103) is located between I/O terminals (1040-1047) and page buffers (1020-1027). The ECC circuit (103) includes a coder configured to generate check bits (ECC) for error correcting and attach the check bits to data to be written into a plurality of memory cell areas (1010-1017), and a decoder configured to employ the generated check bits (ECC) for error correcting the data read out from the memory cell areas (1010-1017). The ECC circuit (103) allocates a set of 40 check bits (ECC) to an information bit length of 4224=528×8 to execute coding and decoding by parallel processing 8-bit data, where data of 528 bits is defined as a unit to be written into and read out from one memory cell area (101j).