Abstract: A system is disclosed whereby a sensor, communication device, or other payload may be lofted to an operational altitude and maintained over an area of interest for some time by a relatively inexpensive and disposable buoyant aircraft, then returned intact to its point of origin or another desired location by a reusable but also relatively inexpensive non-buoyant aircraft. Automatic unpiloted control is used for all stages of flight, including ascent, loiter, return, and landing Specialized equipment can be provided to simplify launch procedures, reducing the number of personnel required to operate the system.

Abstract: Provided are an apparatus for synthesizing carbon nanotubes, the apparatus including a reaction tube that provides a space for carbon nanotubes and is formed vertically long, a heating unit that is formed at the outer side of the reaction tube, and heats the reaction tube, a gas-supply unit that sprays reaction gas for synthesizing the carbon nanotubes by reacting with catalysts positioned inside the reaction tube, an exhaustion unit that is connected to the upper portion of the reaction tube, and discharges non-reacted reaction gas for synthesizing the carbon nanotubes, and a blocking unit that is formed inside the reaction tube, discharges only the non-reacted reaction gas for synthesizing the carbon nanotubes to the exhaustion unit, and blocks the discharge of the carbon nanotubes and catalysts, in which the cross-section of the blocking unit is divided in a plurality of polygon structures, and downward-slanted blocking wings are formed at each divided cell.

Abstract: A ballast circuit is provided. The ballast circuit comprises a first lamp set, a second lamp set, a detection circuit, and a latch circuit. The first lamp set comprises a first inductor and a plurality of containing areas. The second lamp set comprises a second inductor and at least one containing area. The detection circuit is configured to receive a direct current (DC) voltage and coupled to the containing areas of the first and second lamp sets so that the detection circuit, the first inductor, the second inductor, and a plurality of lamps contained in the containing areas are in a series connection and generate a first signal. The latch circuit is coupled to the detection circuit and configured to selectively start in response to the first signal.

Abstract: Method and apparatus for implementing communication between a software side and a hardware side of a test bench in a transaction-based acceleration verification system are described. In one example, transactors and communication channels are identified in a hierarchy of the test bench. Software side endpoints of the communication channels are automatically bound to hardware side endpoints of the communication channels during verification based on naming attributes of the transactors and communication channels with respect to the software side and the hardware side of the test bench.

Abstract: A power supply for supplying power to a lamp with functions of dimming, over-current protection, over-voltage protection, arcing protection, and low-temperature start-up is provided. When frequency of the output current exceeds a predetermined value, the power supply is turned off to accomplish a dimming goal and extend lifetime of the lamp. When abnormal statuses such as open-circuited status, short-circuited status, or arcing status occur, a surge current induced by the abnormal statuses may be eliminated to prevent the power supply from being damaged. A high-frequency current detection circuit is configured to detect whether a current supplied to the high-voltage load is a high-frequency current to prevent damage to the electronic elements in the high-voltage load. A current adjusting circuit is configured to adjust an alternating current outputted to a lamp set in response to an environment temperature to supply an adequate alternating current at a low temperature for starting the lamp set.

Abstract: An over-voltage protection circuit structure for protecting a high power translation circuit is provided. The over-voltage protection circuit structure receives an alternating current input and comprises a relay circuit, a voltage detection module, and an energy supply circuit. The relay circuit relays the alternating current input to the high power translation circuit. The energy supply circuit provides power to the voltage detection module in response to the alternating current input. The voltage detection module detects a voltage value of the alternating current input continuously. When the voltage value is greater than or equal to a first reference value, the voltage detection module generates an over-voltage signal. The relay circuit opens to cease delivering the alternating current input into the high power circuit in response to the over-voltage signal, thus the purpose of protecting the high power circuit is achieved.

Abstract: A clock recovery circuit for digital data transmission includes a delay lock loop having a first loop which generates a phase difference signal which is indicative of a quantized phase difference between a data signal and a clock signal; and a second loop which generates a phase difference signal which is a smooth, continuous function of the phase difference between the data signal and the clock signal, such as a phase difference signal which is proportional to the phase difference. The delay lock loop may include two phase shifters in series, and one or both of these may include a phase interpolator.

Abstract: A supercharger for an internal combustion engine having an internal reservoir adapted to receive a supply of lubricating oil. An oil slinger is mounted on the impeller shaft for rotation therewith that extends into the reservoir for collecting and slinging lubricating oil onto the supercharger bearings, shafts and the drive and impeller gears. A baffle assembly is carried by the interior of the supercharger housing for controlling the volume and flow of lubricating oil onto said gears and bearings and directing oil flow therefrom back into said reservoir to prevent excessive lubrication buildup on the gears and the deleterious effects that result therefrom.

Abstract: Streaming media network transportation streams are created using an electronic system and transmitted via an electronic interface such as an existing system network conduit (i.e. Ethernet, USB, or other packet-based architectures). A scalable hardware and/or software compute engine modifies an initial stream's identifier(s) while replicating the stream content to economically create streams. Hence, an entire network's capacity of active streams may be created from a single initial stream. In one examples, an initial stream is stored in advance of transmission for such use. In other examples, an initial stream is received and processed to dynamically create streams from the initial stream as the initial stream is being received.

Abstract: Method, apparatus, and computer readable medium for restructuring a software program hierarchy having interface files and implementation files that include the interface files are described. In one example, dependencies between program units in the interface files and the implementation files are determined. The dependencies are represented as a plurality of bit strings. Correlated bitstrings of the plurality of bit strings are clustered into a plurality of partitions. Each of the plurality of partitions is transformed into corresponding program units. New interface files are respectively created having the corresponding program units for each of the plurality of partitions.

Abstract: A method, apparatus and method for compiling a hardware design for performing hardware emulation using synchronized processors is described. The apparatus comprises a plurality of processors defining a processor group for evaluating data regarding a hardware design and a synchronizer for synchronizing the operation of the processor group while emulating at least a portion of the hardware design. The method comprises providing a synchronization signal to a plurality of processors defining a processor group for evaluating data regarding a hardware design, receiving a ready signal from the processor group, and providing an execution signal to the processor group, where the execution signal causes the processor group to evaluate a submodel. The method for compiling the hardware design comprises converting at least one high-level construct into a sequence of operations and identifying a sequence of operations that comprise at least one conditional submodel.

Abstract: A method and apparatus for producing a verification of digital circuits is provided. In an exemplary embodiment, a set of Boolean and Integer constraints are derived, and a set of Boolean and Integer stimuli are generated that meet the constraints. These stimuli are then used to verify a digital design, and a verification report is generated. In other example embodiments, a computing apparatus and computer software product are provided. The computer software product containing a set of executable instructions that, when executed, configure the computing apparatus to produce a verification report by the provided methods.

Abstract: Video content information associated with a video content is received by a computing device. End destination information associated with a reception instance of the video content is also received by the computing device. At least a portion of the video content information and at least a portion of the end destination information are selectively aggregated to generate aggregated information.

Abstract: Method and apparatus for translating a verification process having recursion for implementation in a logic emulator are described. Examples of the invention relate to a method, apparatus, and computer readable medium for translating a verification process for implementation in a hardware emulator of a logic verification system. A recursive task called by the verification process is identified. A copy of the recursive task is incorporated into the verification process. Interface registers are instantiated for the recursive task. Control flow transfer points are defined in the verification process. Calls of the recursive task are converted in the verification process to constructs for accessing the interface registers and transferring control flow among the control flow transfer points. The verification process is reorganized to describe a finite state machine (FSM) configured for implementation in the hardware emulator.

Abstract: One embodiment of the present invention can include a computer program product comprising one or more computer readable media storing a set of computer instructions that are executable by one or more computer processors, wherein the set of computer instructions comprise instructions executable to generate a command according to a generic command structure, forward the command to a remote computer, receive the command at the remote computer and translate the command to platform specific format.

Abstract: Methods and apparatus, including computer program products, for RFID-based personnel tracking. A method of tracking employees includes, in a first computer system, prompting a user for identification input, validating the identification input, receiving data from a first scan of a Radio Frequency Identification (RFID) tag upon initiation of a task, receiving data from a second scan of the RFID tag upon termination of the task, and uploading the identification input and the data of the first and second scans to a second computer system for storage and correlation.

Abstract: In one embodiment, a method comprises retaining at least a portion of simulation results corresponding to a first simulateable partition from a previous simulation time; and using the simulation results for a second simulateable partition (or the first simulateable partition) at a current simulation time if the second simulateable partition is equivalent to the first simulateable partition and one or more input stimuli to the second simulateable partition at the current simulation time are approximately the same as the input stimuli to the first simulateable partition at the previous simulation time. Computer accessible media storing instructions that implement the method are also contemplated.

Abstract: The present invention relates to a method for manufacturing products comprising transponders. The method comprises introducing a web comprising on its surface sequential structural modules comprising an impedance matching element and an integrated circuit electrically connected to the impedance matching element, the structural modules having a first distance between each other; cutting the web in such a manner that the sequential structural modules are separated from each other; attaching the structural modules to a product substrate, the sequential structural modules having a second distance between each other, the second distance being longer than the first distance; and attaching the impedance matching elements to antennas, the impedance matching elements and the antennas forming an electrical connection.

Abstract: A weight sled apparatus useful for strength training and simulating the resistance of an opponent during a blocking event has a tubular construction forming a U-shaped member having a pair of parallel legs which serve as runners. A weight bearing member affixed to and extending between the pair of runners allows mounting of removable mount weights on a horn projecting therefrom. A crossbar extending between the runner ends presents a rearward facing surface at least 8 inches above the plane of the runners against which force may be applied. An optional handlebar attachment presents a rearward facing surface against which force may applied in a range from 8 inches to 40 inches above the plane of the runners and normal thereto. The weight sled affords a trainee multiple force application surfaces near the center of gravity of the sled and at differing vertical heights, enabling a more realistic simulation of the resistance presented during a blocking event.

Abstract: In one embodiment, a method for simulating an electric circuit that is represented as one or more partitions, each partition comprising a plurality of constituents representing portions of the circuit, wherein at least one of the constituents is a variable constituent for which the corresponding portion of the electronic circuit includes non-linear behavior, comprises: determining a first matrix for the variable constituent, wherein the first matrix describes a system of equations that represents a behavior of the variable constituent; determining a second matrix for the partition, wherein the second matrix permits calculation of short circuit currents from open circuit voltages according to a node tearing analysis method; and simulating a timestep of the simulation, the simulating comprising iteratively solving a state of the partition using successive guesses of the state of the variable constituent, wherein each iteration comprises solving the variable constituent independently to generate the open circuit