Patents Represented by Law Firm Hopgood, Califmafde, Kalil & Judlowe
  • Patent number: 5686717
    Abstract: A bar code symbol reading system having a laser scanner, and a multi-port digital signal decoder capable of decoding digital signals produced from various types of scanning devices including, for example, high-speed counter top scanners, low-speed hand-held scanners, wand scanners, light pen scanners, and magnetic card scanners. The digital signal decoder includes a plurality of data input ports for receiving digital input signals produced from the various scanning devices. The digital signal decoder also includes common digital signal and data processing circuitry for processing the digital input signals and digital data so as to produce, as output, decoded symbol data. In addition, the digital signal decoder further includes an output data port for providing the decoded symbol data to a host device operably connected to the digital signal decoder. In the illustrative embodiment, the digital signal decoder is realized using VLSI circuit and microprocessor technology.
    Type: Grant
    Filed: June 3, 1996
    Date of Patent: November 11, 1997
    Assignee: Metrologic Instruments, Inc.
    Inventors: Carl Harry Knowles, George Kolis
  • Patent number: 5392412
    Abstract: A data communication controller having a memory access control unit characterized by a symmetrical access port architecture. The memory access control unit allows both a host processor and the medium access control (MAC) unit of the data communication controller to transparently access a single-port data packet buffer memory while operating at full specified operating speed and without interference between simultaneous memory access requests. The memory access control unit arbitrates asynchronous memory access requests from both the host processor and the medium access control unit, while permitting each of these processors unlimited access to the single-port buffer memory as if it alone had the full memory available to itself at all times. The above capabilities are achieved using automatic address incrementation and data-byte prefetching operations, without requiring the use of a port processor or additional internal data buses.
    Type: Grant
    Filed: October 3, 1991
    Date of Patent: February 21, 1995
    Assignee: Standard Microsystems Corporation
    Inventor: James L. McKenna