Abstract: A method for fabricating devices in a multi-layer structure adapted for the formation of enhancement mode high electron mobility transistors, depletion mode high electron mobility transistors, and power high electron mobility transistors includes defining gate recesses in the structure. The structure has, on a substrate, a channel layer, spacer layer on the channel layer, a first Schottky layer, a second Schottky layer on the first Schottky layer, and a third Schottky layer on the second Schottky layer, and a contact layer on the third Schottky layer. Etch stops are defined intermediate the first and second Schottky layers, intermediate the second and third Schottky layers, and intermediate the third Schottky layer and the contact layer.

Abstract: A microstrip antenna configuration employs a metallic patch which is positioned on the top surface of a dielectric substrate. The dielectric substrate has the bottom surface coated with a suitable metal to form a ground plane. A hole is formed through the ground plane, through the dielectric to allow access to the bottom surface of the patch. A center conductor of a coaxial cable is directly connected to the patch. The center conductor of the coaxial cable is surrounded by a metallic housing within the substrate area. The patch forms a first plate for the capacitance while the diameter of the outer housing of the coaxial cable within the substrate is increased to form another plate on the end of the coaxial cable. The value of capacitance can be adjusted by the area of the metallic housing the relative dielectric constant of the spacing material, and the spacing between the plates.