Abstract: In a sampled amplitude magnetic read channel, pulses in an analog signal corresponding to flux transitions on a magnetic medium are sampled and equalized into a first equalization for estimating sample values and into a second equalization for sequence detection of digital data. A gain and phase error detector generate respective error signals corresponding to the difference between estimated and actual sample values. Gain control and timing recovery use the error signals to adjust the amplitude and sampling frequency/phase of the analog read signal. A pair of programmable discrete time filters equalize the signal samples into the desired equalization. In a first embodiment, the signal samples are equalized to PR4 for estimating sample values and to EPR4 for sequence detection. A slicer processes the PR4 equalized sample values to generate the estimated sample values.

Abstract: In a sampled amplitude read channel for magnetic recording, a nonlinear discrete time decimation filter in a negative feed back loop adjusts a DC offset in an analog read signal from a magnetic read head without distorting the read signal. In sampled amplitude recording, adding the samples of an isolated positive pulse to the samples of an isolated negative pulse generates the DC offset of the discrete time sample values. A decimation filter adds the sample values from a positive pulse to the sample values of a negative pulse in order to detect and pass the DC offset in the read signal. The detected discrete time DC offset from the discrete time decimation filter is converted into an analog DC offset signal and subtracted from the analog read signal in a negative feedback loop. A running average decimation filter removes the DC offset during acquisition, and a decision-directed decimation filter removes the DC offset during tracking.

Abstract: A method and apparatus for encoding, detecting and decoding data in a Partial Response (PR) class-IV magnetic recording storage system that does not require the conventional interleave constraint and therefore minimizes the path memory and latency of a sequence detector such as the Maximum Likelihood (ML) Viterbi detector. Rather than encoding an interleave constraint to ensure merging of path memories in the detector, the parity of the encoded codewords is utilized in selecting tile correct sequence out of the unmerged paths. The encoding technique encodes the data using two groups of codewords; the first group causes the path memories of the sequence detector to merge into one survivor sequence and the second group causes the path memories to merge into two survivor sequences different in only one bit and thus different in parity. The correct survivor sequence is thereby selected according to the parity of the codeword being detected.

Abstract: In a synchronous read channel for magnetic recording, a timing recovery phase-locked loop (PLL) comprises a technique for smoothing a timing gradient .DELTA.t computed from estimated sample values and actual sample values. If an estimated sample value for computing the timing gradient is zero, then the timing gradient is increased, and if all of the estimated sample values for computing the timing gradient are zero, then the timing gradient is copied from its prior value. Smoothing the timing gradient reduces gain variations in the PLL and results in more effective timing recovery.

Abstract: A PID filter employed in a timing recovery phase-locked loop (PLL) for synchronizing the sampling of a read signal from a magnetic read head in a sampled amplitude read channel for magnetic recording. In addition to a proportional and integral term, the PID filter comprises a derivative term to decrease the settling time of the PLL by increasing the phase margin and damping. Consequently, the PLL locks onto the acquisition preamble in a shorter period thereby reducing the necessary preamble length and maximizing storage area for user data. The derivative term of the loop filter is disabled during tracking mode in order to attenuate noise in the phase error and to reduce gain variance associated with tracking arbitrary user data. The structure of the PID loop filter is transformed into an alternative structure in order to minimize the computation path latency between delay registers to avoid limiting the speed of the read channel.

Abstract: A high precision fast finite impulse response (FIR) filter which periodically samples an analog input signal and holds a sequentially-replaced number of the resulting discrete-time analog values in fixed storage cells while each value is being multiplied by a number of digital weights. The discrete-time analog values are not passed through delay devices and therefore do not degrade. The weights are stored in a memory or shift register and supplied to the multipliers in a repeating sequence. A predetermined number of the weights are set to zero to increase the setup time of the analog multipliers thereby increasing the precision without slowing the clocking frequency.

Abstract: A real time defect scanning system integrated into a sampled amplitude read channel for detecting defects in a magnetic storage medium using a discrete time filter having an impulse response substantially matched to an error signature in a read back signal caused by a defect in the medium. The scanning system operates by writing a predetermined bit sequence to the storage device and detecting medium defects upon read back. In a sinusoidal read signal mode, a discrete time notch filter removes the fundamental frequency so that any remaining sidebands indicate a media defect. The discrete time defect filter enhances the signal so that a defect can be detected with a discrete time energy detector. The impulse responses of the notch filter and defect detection filter are programmable in order to adapt the defect scanning system to a particular disk drive, data density, or magnetic media.

Abstract: A method and apparatus for encoding, detecting and decoding data in a Partial Response (PR) class-IV magnetic recording storage system that does not require the conventional interleave constraint and therefore minimizes the path memory and latency of a sequence detector such as the Maximum Likelihood (ML) Viterbi detector. Rather than encoding an interleave constraint to ensure merging of path memories, in the detector, the parity of the encoded codewords is utilized in selecting the correct sequence out of the unmerged paths. The encoding technique encodes the data using two groups of codewords: the first group causes the path memories of the sequence detector to merge into one survivor sequence, and the second group causes the path memories to merge into two survivor sequences different in only one bit and thus different in parity. The correct survivor sequence is thereby selected according to the parity of the codeword being detected.