Abstract: The dressing system of the present invention provides, in one aspect, a composite dressing that allows a wound to be dressed in one easy step and redressed without disturbing the wound. The composite dressing comprises a contact component having a bottom side facing a wound, and a top side. A dressing component is releasably attached to the top side of the contact component such that the dressing component can be readily separated from the contact component if pulled relative to the contact component. The contact component can remain on the wound to prevent disturbance, and another composite dressing or dressing component can be applied to the contact component.

Abstract: A method for providing color correction to a color marking engine for halftone and contone images includes the step of first generating a test pattern. This test pattern has a plurality of discrete images disposed thereon with the discrete images having characteristics that are correlated with parameters of the print job. In one mode, they relate to halftone images that have differing densities of dots, each less than 100% density. The images are correlated to different bit values for the same densities such that the maximum density value for the pixel is offset for different images. A user then views the different images and determine which one is closest to a true gray and then selects the offset bit value for that image as the marking engine offset. This can then be applied to that particular marking engine. This can be utilized for a plurality of marking engines (651) with a single RIP (650).

Abstract: A distributed control system (14) receives on the input thereof the control inputs and then outputs control signals to a plant (10) for the operation thereof. The measured variables of the plant and the control inputs are input to a predictive model (34) that operates in conjunction with an inverse model (36) to generate predicted control inputs. The predicted control inputs are processed through a filter (46) to apply hard constraints and sensitivity modifiers, the values of which are received from a control parameter block (22). During operation, the sensitivity of output variables on various input variables is determined. This information can be displayed and then the user allowed to select which of the input variables constitute the most sensitive input variables. These can then be utilized with a control network (470) to modify the predicted values of the input variables. Additionally, a neural network (406) can be trained on only the selected input variables that are determined to be the most sensitive.

Abstract: A load center monitor (10) is disclosed for monitoring and analyzing data gathered by electronic circuit breakers (40) in a power distribution system and communicated to the load center monitor (10) via a network (26) coupling the load center monitor (10) and the circuit breakers (40) together. The load center monitor (10) includes a first communication port (24) for communicating with the circuit breakers (40), a second communication port (20 or 22) for communicating with an external device and third communication port (28) for providing diagnostic information. The load center monitor (10) further includes audible (30) and visible (34) annunciators for providing alarm or status indications. A processor (76), coupled to the communication ports and to a memory (70) having a real-time clock for time stamping data provides monitoring, control, analysis and data generating capability in the load center monitor (10).

Abstract: A system including a load center monitor (10) connected to a plurality of digitally enhanced circuit breakers (40) by a communication bus (26) forms a network of reconfigurable circuit breakers which provides advanced monitoring and control of an electrical power distribution system. A user port (20) and a service port (22) provide a communication interface with an external computer. Visual indicators (34) and an audible alarm (30) provide for alerting persons to certain conditions in the system. Buttons are provided for CLEAR (38), RESET (36), and TEST functions, and a diagnostic port (24) is also provided. The load center monitor (10) is operable to monitor the operation of the circuit breakers (40) and download information therefrom for storage in the load center monitor (10) as in the form of historical data.

Abstract: A novel toroidal core current sensor for an AFCI/GFCI Circuit Breaker and a test circuit configuration based thereon is disclosed. The current sensor has a plurality of load current conductors extending therethrough. One of the conductors carrying a load current has a portion of the load current shunted outside the core through a shunt conductor which is connected in parallel with one of the load current conductors. The secondary of the transformer outputs a current value proportional to and substantially less than the load current which may be, for example, detected by a control circuit which compares the current value against predetermined stored criteria and operates a circuit breaker accordingly. In the test circuit a power source and a waveform generator are provided for operating an AFCI\GFCI circuit breaker having the shunted current sensor and injecting test signals into a terminal of the circuit breaker.

Abstract: A power supply provides a regulated power factor load to a primary power source, and thus low input current distortion, by monitoring: (A) The input voltage; (B) The power source current, not at the input to the power supply, but rather at a point downstream of an EMI filter and a shunt capacitance in the power supply; and (C) The output DC voltage. The power supply uses these inputs to control the power switching transistors to regulate the phase and amplitude of the monitored current. The phase of the monitored current is controlled primarily by the phase of the input voltage. A differentiating circuit in the feedback loop of the power supply control circuitry causes the monitored current to lag the input voltage by an amount equal to the lead induced in the phase of the input current by the EMI filter and shunt capacitor so that the actual input current to the power supply is in phase with the input voltage.

Abstract: A neural network system is provided that models the system in a system model (12) with the output thereof providing a predicted output. This predicted output is modified or controlled by an output control (14). Input data is processed in a data preprocess step (10) to reconcile the data for input to the system model (12). Additionally, the error resulted from the reconciliation is input to an uncertainty model to predict the uncertainty in the predicted output. This is input to a decision processor (20) which is utilized to control the output control (14). The output control (14) is controlled to either vary the predicted output or to inhibit the predicted output whenever the output of the uncertainty model (18) exceeds a predetermined decision threshold, input by a decision threshold block (22).

Abstract: A multi-processor system is provided having a processor array configured of a plurality of CPUs (20) that are disposed on a global bus (14). A VEM interface (18) is provided for interfacing between the global bus (14) and a system bus (12). Interrupts that are generated on the system bus (12) are mapped to the CPUs (20) through an interrupt controller (82). The interrupt controller (82) is operable to receive multiple interrupts and store these interrupts and their associated interrupt vectors. After storage, a gating register associated with each CPU (20) is examined to determine which interrupts are serviced by a particular CPU (20). If an interrupt is received that is to be serviced by one or more of the CPUs (20), then an external interrupt is generated for that CPU (20).

Abstract: A realtime clock integrated circuit includes a memory (30) that has a plurality of addressable locations therein. The memory (30) has two portions, a lower portion and an upper portion. The lower portion is addressed by the seven least significant bits which are extracted from an input address bus (50). The seven address bits are latched in an address latch (54) for input to the address input of the memory (30). An eighth most significant address bit is received from an external line (64), which is attached to a separate bus on a personal computer other than that of the bus (50). The eighth most significant bit is latched in an address latch (62) for presentation to the most significant bit of the address input memory (30). When this most significant bit is high, the upper portion of the memory (30) is accessed.

Abstract: A shoe sanitizer and method for sanitizing shoes are disclosed. The shoe sanitizer includes a platform having a raised central portion and two lowered side portions which are on opposite sides of and adjacent to the central portion. The central portion and the two side portions have respective reservoirs with open upper ends. Absorbent pads are placed in each of the reservoirs. A sanitizing solution is placed in the reservoir of the central portion and saturates the respective absorbent pad. The absorbent pads located in the reservoirs of the side portions of the platform are dry. A person sanitizes the bottom of a pair of shoes he is wearing by first placing a lower portion of one shoe in the reservoir of the central portion and wetting the bottom of the shoe with the sanitizing solution. Then, the shoe is removed from the sanitizing solution and placed into the one of the reservoirs of the two side portions which corresponds to the foot on which the shoe being treated is worn.

Abstract: A predictive network is disclosed for operating in a runtime mode and in a training mode. The network includes a preprocessor (34') for preprocessing input data in accordance with parameters stored in a storage device (14') for output as preprocessed data to a delay device (36'). The delay device (36') provides a predetermined amount of delay as defined by predetermined delay settings in a storage device (18). The delayed data is input to a system model (26') which is operable in a training mode or a runtime mode. In the training mode, training data is stored in a data file (10) and retrieved therefrom for preprocessing and delay and then input to the system model (26'). Model parameters are learned and then stored in the storage device (22). During the training mode, the preprocess parameters are defined and stored in a storage device (14) in a particular sequence and delay settings are determined in the storage device (18).

Abstract: A user headset is provided that is operable to contain an audio device (50) and a receiver (52). The receiver (52) is operable to receive both audio information on multiple channels and also data. The data is received in the form of pulse width modulated sync signals. The sync signals are operable to provide a synchronization signal for 3-D liquid crystal lenses (60). The data is encoded within the sync signal through pulse width modulation. The width of the pulse defines various commands. These various commands define the channel over which the audio is to be transmitted. These channels can either be user-defined or they can be a function of the transmitter. The transmitter includes an audio generator (42) for generating audio signals on multiple channels and also a data generator (40). These are modulated onto a broad band optical signal and transmitted via an IR data link.