Abstract: A multilevel cache buffer for a multiprocessor system in which each processor has a level one cache storage unit which interfaces with a level two cache unit and main storage unit shared by all processors. The multiprocessors share the level two cache according to a priority algorithm. When data in the level two cache is updated, corresponding data in level one caches is invalidated until it is updated.
Type:
Grant
Filed:
August 20, 1991
Date of Patent:
January 4, 1994
Assignee:
International Business Machines Corporation
Inventors:
Patrick W. Gallagher, Steven L. Gregor, Stephen M. Reeve