Abstract: A phase comparator is used to test a device under test comprising an input/output (I/O) circuit by applying a signal to the device under test; extracting a phase signal from the phase comparator; and determining parametric information pertaining to the I/O circuit of the device under test from the phase signal.

Abstract: In an analog-to-digital converter, an analog-to-digital conversion stage comprising a comparator and an analog residual signal generator. The comparator is operable to compare an analog input signal or a sample of the analog input signal with a threshold to generate a bit signal. The analog residual signal generator is operable to generate an analog residual signal from signals comprising the sample of the analog input signal and the bit signal such that, at a level of the analog input signal equal to the threshold of the comparator, the analog residual signal has a level independent of the state of the bit signal. The analog residual signal generator comprises a summing element, a selective inverter and an amplifier in series. The summing element is operable to sum a signal input to it with a reference signal.

Abstract: A voltage sensor capable of single-point or simultaneous multi-point contactless voltage measurement has an electro-optic transducer, a surface plasmon resonance (SPR) and an optical system. The electro-optic transducer is operable to translate an electric field dependent on the voltage in a device under test field to a variation in refractive index. The surface plasmon resonance (SPR) transducer is juxtaposed with the electro-optic transducer and is operable to translate the variation in the refractive index of the electro-optic transducer to a variation in reflectivity. The optical system is configured to illuminate the SPR transducer with incident light at a surface plasmon resonance-inducing angle of incidence and to detect light reflected by the SPR transducer at a single point or at multiple points within a region.

Abstract: A digital-to-analog conversion system comprises a digital input, a digital-to-analog converter and a modified digital signal generator. The digital-to-analog converter has a conversion frequency and is subject to a periodic error having a periodicity equal to that of an N-th sub-harmonic of the conversion frequency, where N is an integer. The digital input is operable to receive a digital input signal. The modified digital signal generator is interposed between the digital input and the digital-to-analog converter and is operable in response to the digital input signal to generate a modified digital signal. The modified digital signal comprises a dynamic digital mitigation component that mitigates the periodic error of the digital-to-analog converter.

Abstract: A measurement inside a specimen is performed by providing a nanoscale FET probe comprising a cantilever element and a nanowire extending from the cantilever element. The nanowire is electrically connected to the cantilever element at at least one of the ends of the nanowire. The nanowire is coated along at least part of the length thereof with molecules of a capture agent. The cantilever element is moved to insert the nanowire onto the specimen. An electrical property of the nanoscale FET probe is monitored to detect binding events between the capture agent molecules and an analyte of interest inside the specimen.

Abstract: Embodiments of the current-mode track and hold circuit comprise a cascode input stage, a dynamic biasing stage, a cascode output stage, and a switch operable to interconnect the input stage and the output stage. The input stage is connected to receive an input current. The dynamic biasing stage is connected to receive a scaled version of the input current as a dynamic biasing current and dynamically biases the input stage in response to the dynamic biasing current. Dynamically biasing the track-and-hold circuit in response to a dynamic biasing current that is a scaled version of the input current significantly increases the maximum peak-to-peak voltage swing allowed at the input of the track-and-hold circuit and enables a corresponding increase in signal-to-noise ratio. These benefits are obtained at the expense of only a small increase in power consumption.

Abstract: The method defines an input state vector that achieves low power consumption when applied to the circuit inputs of a digital circuit in an idle state. In the method, independent determinations are performed. Each determination defines a respective set of the input states of the input state vector. Any conflict the definitions of any one or more of the input states is resolved in favor of the definition of the one or more of the input states that achieves the lowest idle power consumption when the input state vector incorporating the one or more of the input states in accordance with the definition is applied to the circuit inputs of the digital circuit in the idle state.

Abstract: The tunnel junction structure comprises a p-type tunnel junction layer of a first semiconductor material, an n-type tunnel junction layer of a second semiconductor material and a tunnel junction between the tunnel junction layers. At least one of the semiconductor materials includes gallium (Ga), arsenic (As) and either nitrogen (N) or antimony (Sb). The probability of tunneling is significantly increased, and the voltage drop across the tunnel junction is consequently decreased, by forming the tunnel junction structure of materials having a reduced difference between the valence band energy of the material of the p-type tunnel junction layer and the conduction band energy of the n-type tunnel junction layer.

Abstract: An embodiment of the acoustically-coupled transformer has first and second stacked bulk acoustic resonators (SBARs) each having a stacked pair of film bulk acoustic resonators (FBARs) with an acoustic decoupler between the FBARs. Each FBAR has opposed planar electrodes with piezoelectric material between the electrodes. A first electrical circuit connects one FBARs of the first SBAR to one FBAR of the second SBAR, and a second electrical circuit connects the other FBAR of the first SBAR to the other FBAR of the second SBAR. The c-axis of the piezoelectric material of one of the FBARs is opposite in direction to the c-axes of the piezoelectric materials of the other three FBARs. This arrangement substantially reduces the amplitude of signal-frequency voltages across the acoustic decouplers and significantly improves the common mode rejection of the transformer. This arrangement also allows conductive acoustic decouplers to be used, increasing the available choice of acoustic decoupler materials.

Abstract: The optical receiver comprises an optical input path, a light detector array, an optical converging element and an information signal generator. The light detector array includes light detectors and a light-sensitive surface. Each light detector generates an electrical signal in response to light. The optical converging element is located to focus an optical input signal received via the optical input path to form a spot on the light-sensitive surface of the light detector array. The spot has an area less than the area of the light-sensitive surface but greater than the area of one of the light detectors. The information signal generator generates an electrical information signal from at least one of the electrical signals. In an embodiment, the information signal generator includes a summer that sums the electrical signals generated by the light detectors to generate the electrical information signal.

Abstract: The network monitoring system comprises a network router with built-in monitoring data gathering. The network router includes channels through which data pass in packets. Each of the packets includes a packet header. The network router additionally includes a header copier and a packet generator. The header copier generates a header copy from the packet header of at least some of the packets. The packet generator receives the header copies and forms monitoring data packets from them. Each monitoring data packet additionally represents temporal data relating to the header copies included in it. A method of obtaining performance data relating to a data transmission network that includes a node passes data through the node in packets. Each of the packets includes a packet header. At least some of the packet headers are copied to obtain respective header copies as monitoring data from which monitoring data packets are formed.

Abstract: The interleaved clock generator generates N interleaved clock signals in response to an input clock signal. The interleaved clock generator comprises an interleaved clock generator of a first type for receiving the input clock signal and for generating M interleaved intermediate clock signals in response to the input clock signal. The interleaved clock generator of the first type includes either a multi-stage serial-delay circuit or a ring counter circuit. The interleaved clock generator additionally comprises M interleaved clock generators of a second type, each of which is each for receiving a respective one of the intermediate clock signals from the clock generator of the first type and for generating N/M of the N interleaved clock signals in response to the respective one of the intermediate clock signals.

Abstract: The acoustically-coupled transformer includes first and second stacked bulk acoustic resonators (SBARs), each having a stacked pair of film bulk acoustic resonators (FBARs) with an acoustic decoupler between them. In one embodiment, the acoustic decoupler comprises a layer of decoupling material has having a nominal thickness equal to an odd integral multiple of one quarter of the wavelength of an acoustic wave having a frequency equal to the transformer's center frequency. In another embodiment, the acoustic decoupler comprises a Bragg stack. Each FBAR has opposed planar electrodes with piezoelectric material between them. The transformer additionally has first terminals, second terminals, a first electrical circuit connecting one FBARs of the first SBAR to one FBAR of the second SBAR and the first terminals, and a second electrical circuit connecting the other FBAR of the first SBAR to the other FBAR of the second SBAR and the second terminals.

Abstract: The wafer-scale assembly method provides first elements arrayed on a wafer with adjacent ones of the first elements separated by a predetermined spacing. Second elements are also provided. A spacing-defining jig is provided that includes recesses corresponding in size to the second elements. Adjacent ones of the recesses are separated by a spacing equal to the predetermined spacing. The second elements are inserted into the recesses of the spacing-defining jig and are then affixed to the wafer with the second elements in alignment with corresponding ones of the first elements. Inserting the second elements in to the jig in which the recesses are separated by a spacing equal to the predetermined spacing allows a single alignment operation to provide accurate alignment between all the first elements, e.g., image sensors, arrayed on the wafer and all the second elements, e.g., lens assemblies, that are to be affixed to the first elements arrayed on the wafer.

Abstract: Self testing of a data communication system that includes a presettable scrambler and a complementary presettable descrambler is performed by presetting the presettable scrambler to a preset state. A seed payload field is scrambled using the presettable scrambler to generate fields of a test sequence. The fields of the test sequence are transmitted and corresponding received test sequence fields are received. The received test sequence fields are descrambled using the presettable descrambler to generate respective recovered test sequence fields. Differences between the recovered test sequence fields and the seed payload field are then detected as errors. In an embodiment, the seed payload field and the preset state of the presettable scrambler are chosen to generate a test sequence that imposes a known stress, such as a given run length, to the data communication system.

Abstract: The CRCSEL comprises a single-mode optical gain structure and an optically-resonant cavity. The single-mode optical gain structure is structured to generate excitation light having a wavelength and a direction. The optically-resonant cavity is optically coupled to the single-mode optical gain structure and is structured to emit an output light beam in a direction substantially orthogonal to the excitation light. The change in light direction provided by the optically-resonant cavity enables the output light beam to emit from a surface while allowing the excitation light to be generated in a large, high-gain single-mode optical gain structure.

Abstract: An optical switch that includes optical paths organized into a set of M input optical paths and a set of N output optical paths, where at least one of M and N is greater than unity. The optical switch additionally includes a faceted mirror corresponding to each of the M input optical paths and including N facets and a faceted mirror corresponding to each of the N output optical paths and including M facets. Finally, the optical switch includes a moving mechanism coupled to each faceted mirror to step the faceted mirror linearly in a direction orthogonal to the optical paths to selectively align one of the facets of the faceted mirror with the one of the optical paths with which the faceted mirror is associated. The facets of each of the faceted mirror corresponding to one of the sets of optical paths, i.e.

Abstract: The packaging system comprises a mechanical support, an insulating substrate and an electronic circuit. The mechanical support has a first support element that extends at a non-zero angle from a second support element. The insulating substrate has a first portion and a second portion in contact with the first support element and the second support element, respectively. The first portion is contoured to define at least one access hole. The optical communications device and the electronic circuit are mechanically coupled to the first support element. Either or both the optical communications device and the electronic circuit is mechanically coupled to the first support element through a respective one of the at least one access hole. The packaging device additionally comprises a conductive track extending between the electronic circuit and the optical communications device on the first portion of the insulating substrate.

Abstract: The optical domain optical signal sampling device comprises an electrical sampling pulse source and an electrically-controlled optical modulator. The electrically-controlled optical modulator comprises electro-optical material, an optical waveguide located in the electro-optical material and including a bifurcated region, and electrodes disposed along the bifurcated region. The optical waveguide is arranged to receive an optical signal-under-test. At least one of the electrodes is connected to receive electrical sampling pulses from the electrical sampling pulse source. The electrical sampling pulses generate an electric field between the electrodes that differentially changes the refractive index of the electro-optical material in the bifurcated region of the optical waveguide to sample the optical signal-under-test.

Abstract: The nitride semiconductor layer structure comprises a buffer layer and a composite layer on the buffer layer. The buffer layer is a layer of a low-temperature-deposited nitride semiconductor material that includes AlN. The composite layer is a layer of a single-crystal nitride semiconductor material that includes AlN. The composite layer includes a first sub-layer adjacent the buffer layer and a second sub-layer over the first sub-layer. The single-crystal nitride semiconductor material of the composite layer has a first AlN molar fraction in the first sub-layer and has a second AlN molar fraction in the second sub-layer. The second AlN molar fraction is greater than the first AlN molar fraction. The nitride semiconductor laser comprises a portion of the above-described nitride semiconductor layer structure, and additionally comprises an optical waveguide layer over the composite layer and an active layer over the optical waveguide layer.