Abstract: A compact massage machine is provided. The massage machine comprises a rotation axle, a pair of kneading rollers, a pair of installation mechanisms, and a slide-guide mechanism. The kenading rollers are disposed on the rotation axle in an oblique fashion. The installation mechanisms, disposed on the rotation axle, install the kneading rollers on the rotation axle in a manner that the kneading rollers swing in a circumference direction of the installation mechanisms during the rotation of the rotation axle. The slide-guide mechanism, engaging with the kneading rollers, prevents the kneading rollers from rotating during the rotation of the rotation axle.

Abstract: A charged-device model (CDM) electrostatic discharge (ESD) protection for complementary metal oxide semiconductor (CMOS) integrated circuits such as input/output (I/O) circuits. A CDM ESD clamp device is disposed on an output buffer or an input stage of the CMOS circuit in order to clamp the CDM ESD overstress voltage across the gate oxide during a CDM ESD event. When applied to I/O circuits, a bi-directional diode string with multiple diodes is used in conjunction with the CDM ESD clamp device. During the CDM ESD event, CDM charges (CDM Q) originally stored in the common substrate are discharged through the desired CDM ESD clamp device so as to protect all functional devices in the input, output or I/O circuits, and effectively improve the CDM ESD level in integrated circuit (IC) products.

Abstract: A bimetal-based temperature stabilized multi-FBG package with tunable mechanism mainly includes a moving pin, a bimetal fixture, a rotation sleeve, a locking pin. The moving pin has a first predetermined outer screw pitch at one end and an elongated slot at the other end for receiving the locking pin. The bimetal fixture has a main frame and a plate secured to the main frame. The main frame of the bimetal fixture has a tube member extending outwardly from the side wall thereof, and the tube member has a second predetermined outer screw pitch at the distal end thereof. The rotation sleeve has a first predetermined inner thread corresponding to the first predetermined outer screw pitch of the moving pin and a second predetermined inner thread corresponding to the second predetermined outer screw pitch of the bimetal fixture. The grating fiber is first placed inside the moving pin and then the fiber is metallized or soldered to the moving pin and the holding arm of the bimetal fixture.

Abstract: The present invention relates to a chip antenna which comprises a substrate, a feeding pad, a feeding conductor, a matching unit, and a meandering conductor. The substrate formed with a dielectric material. By varying the length of the meandering conductor, the central frequency of the chip antenna can be properly obtained and controlled. The matching unit, which is formed by joining a matching conductor with a ground plate, uses the short-circuit function of the matching conductor to obtain the desired bandwidth. In this way, the chip antenna is well suited for applications in wireless communication systems, including personal mobile communication networks and equipment.

Abstract: A low power high-speed bus receiver which receives a pair of differential signals to obtain the corresponding logic value is provided. The bus receiver includes a differential amplifier, a pair of input switches and a pair of power switches. The differential amplifier has a pair of input terminals and a pair of power terminals. The pair of input switches are respectively connected between the pair of input terminals of the differential amplifier and the pair of differential signals. The pair of input switches are turned on for a predetermined time period to transmit the pair of differential signals to the differential amplifier. The pair of power switches are respectively connected between the pair of power terminals of the differential amplifier and a pair of external power supplies.

Abstract: A method of making a nonvolatile memory device having a high capacitive coupling ratio with a self-aligned floating gate is disclosed. A tunnel dielectric layer, a first conductive layer, and a sacrificial layer are sequentially formed over a semiconductor substrate. Isolation trenches are etched in the substrate through the layers and filled with isolation oxides that protrude over the substrate. Subsequently, the sacrificial layer is removed to leave a cavity between the isolation oxides. A second conductive layer is conformally deposited over substrate, and then planarized or etched back to the isolation oxides. Next, the isolation oxides are etched back to expose additional surface of the second conductive layer. Finally, an inter-gate dielectric layer and a control gate layer are sequentially formed over the substrate.

Abstract: The present invention discloses a method of forming an isolation region in a silicon-containing substrate. The method includes forming a mask layer on the silicon-containing substrate. A window is subsequently formed in the mask layer to expose the isolation area to be formed in the substrate. An oxygen-containing region is formed in the substrate by introducing oxygen-containing ions through the window in the mask layer. Then, the oxygen-containing region is subjected to a thermal treatment, thereby resulting in a silicon oxide insulator (SiOx) for isolating electronic devices.

Abstract: A trench isolation structure characterized by a dielectric stud filling and spanning a trench in a semiconductor substrate is suggested for isolating the integrated circuits fabricated in the semiconductor substrate. The dielectric stud is formed by depositing isolating material in a space defined by the trench and a dielectric layer overlying the semiconductor substrate and being partially removed over an area which spans the trench and extends over the lengthwise edges of the trench.