Patents Represented by Attorney IP Law Group, PLLC
  • Patent number: 7653844
    Abstract: In a communication system based on OSI (Open Systems Interconnection) Reference Model, a pattern body generation circuit of a transmitting device generates and outputs a jitter test pattern body for jitter test. A selector selects an output (frame data) of a transmitting-end upper circuit during normal communication and selects an output (pattern body) of the pattern body generation circuit during jitter test. A transmitting-end MAC circuit performs transmitting-end processing of a MAC layer on the data selected by the selector to thereby obtain a MAC frame. A receiving-end MAC circuit performs receiving-end processing of a MAC layer on a received frame in MAC frame format to thereby obtain a payload. A pattern body verification circuit verifies a pattern body that is a payload obtained by the receiving-end MAC circuit during jitter test against a corresponding pattern body before transmission.
    Type: Grant
    Filed: September 26, 2007
    Date of Patent: January 26, 2010
    Assignee: NEC Electronics Corporation
    Inventor: Kenichi Sasaki