Abstract: A hybrid use of a phase-locked-loop controller and a microprocessor-based controller to synchronize the phase angles of a three-phase AC power source, such as a static power converter, with those of a three-phase power grid. The phase-angle synchronization may enable the AC power source to be safely connected to the power grid to provide additional power capacity.
Abstract: Compounds and methods for the diagnosis and treatment of Chlamydial infection are disclosed. The compounds provided include polypeptides that contain at least one antigenic portion of a Chlamydia antigen and DNA sequences encoding such polypeptides. Pharmaceutical compositions and vaccines comprising such polypeptides or DNA sequences are also provided, together with antibodies directed against such polypeptides. Diagnostic kits containing such polypeptides or DNA sequences and a suitable detection reagent may be used for the detection of Chlamydial infection in patients and in biological samples.
Type:
Grant
Filed:
July 15, 2002
Date of Patent:
July 19, 2005
Assignee:
Corixa Corporation
Inventors:
Ajay Bhatia, Jeff Guderian, Yasir A. W. Skeiky, Jean-Francois L. Maisonneuve
Abstract: A facility for exchanging context attributes is described. A characterization module receives an invocation request to provide an attribute value that was generated by a requesting attribute consumer. The received invocation request identifies the attribute whose value is to be provided. In response to receiving the invocation request, the characterization module provides a value for the identified attribute to the requesting attribute consumer.
Type:
Grant
Filed:
October 19, 2000
Date of Patent:
July 19, 2005
Assignee:
Tangis Corporation
Inventors:
Kenneth H. Abbott, Steven J. Fluegel, Joshua M. Freedman, Dan Newell, James O. Robarts
Abstract: A transconductance amplifier for inductive loads and a relevant inductive load driving method, the amplifier having an input stage receiving a driving signal (set-point), a power stage connected downstream of the input stage and connected to the load and an output stage fedback on the input stage to transfer a signal associated to the load. Advantageously, the input stage comprises at least a comparator receiving on one input the driving signal and on another input the output of the output stage. A delay block is also provided between the comparator output and the power stage to delay the comparator switching. This can be obtained also by using a hysteretic comparator.
Abstract: A generator of at least one pulse width modulated signal, including: a generator of a sawtooth signal a generator of high and low reference signals defining, based on a set-point signal, a linear range of each ramp of the sawtooth signal at least one element of comparison of the sawtooth signal with each of the reference signals and at least one element of logic combination of the comparison results, providing the pulse width modulated signal.
Abstract: An interface manages the exchange of information between a bus system and a memory during reading, according to a communication protocol. The interface has a protocol-decoding unit, which receives from outside commands and information for managing the reading and generates a wait-code enabling signal, and a wait-state generating unit, which is connected to the protocol-decoding unit and outputs wait codes upon receipt of the wait-code enabling signal. When the memory ends reading, as signaled by switching of a read-state signal, a wait-state disabling circuit generates and supplies an end-of-waiting control signal to the wait-state generating unit, which thus outputs an end-of-waiting code.
Type:
Grant
Filed:
April 3, 2002
Date of Patent:
July 12, 2005
Assignee:
STMicroelectronics S.r.l.
Inventors:
Alessandro Francesco Maone, Maurizio Francesco Perroni
Abstract: A two-part disinfecting systems, as well as disinfecting compositions and methods for making and using the same. The two-part disinfecting system contains a first part and a second part adapted to be mixed to yield an aqueous disinfecting composition, wherein the first part comprises a chlorite and the second part comprises an acid and an optional oxidizable colorant, and wherein the first part, the second part, or both the first and second parts comprise an alpha olefin sulfonate.
Type:
Grant
Filed:
February 25, 2003
Date of Patent:
July 12, 2005
Assignee:
Alcide Corporation
Inventors:
Joseph Morelli, C. Cayce Warf, Jr., Maura Aldrich, Cecilia Moser Morse, Jean Wiley
Abstract: A circuit for exchanging communications via a transmission line, including a detector for detecting a predetermined start-of-communication signal, a means for coupling the transmission line on the one hand to a transmit line to provide outgoing communications to the transmission line, and on the other hand to a receive line, to receive incoming communications from the transmission line. The detector is connected to the transmit line.
Abstract: A digital system comprises a digital data processing unit, at least one output buffer connected to the processing unit to generate output signals in response to digital signals arriving from the processing unit and at least one user unit connect as output buffer load. With a view to assuring that the switching current of the output buffer can be set to different values, the output buffer comprises means for fixing the switching current to a value that is substantially constant and independent of the load and means for selectively setting the value of the switching current and the processing unit comprises means for storing a predetermined parameter; said means are connected to the selective setting means for setting the values of the switching current as functions of the predetermined parameter.
Abstract: Compositions and methods for the therapy and diagnosis of cancer, such as lung cancer, are disclosed. Compositions comprise one or more polynucleotides that encode a lung tumor protein, or a fragment or variant thereof. The compositions may be used to detect an mRNA encoding a lung tumor protein in a sample.
Abstract: An electric power generating system is provided that comprises a fuel cell stack having at least one solid polymer fuel cell, a cooling system having a coolant flow path that directs coolant to and from the stack, a fuel regulating system having a fuel flow path and for regulating the supply of fuel from a fuel supply to the stack via the fuel flow path, and a hydrogen concentration sensor. The sensor is located in the vicinity of the fuel regulating system and in the coolant flow path at a location downstream of the stack to detect hydrogen that may have been discharged by components of the power generating system in the coolant flow path upstream of the sensor, or by the fuel regulating system. In the event the measured hydrogen concentration exceeds a threshold level, steps are taken to reduce or stop the discharge of hydrogen from the power generating system.
Abstract: Management of Test Access Port functions of a plurality of components arranged on a single chip by selectively driving the TAP function of each of the components with respective clocks, whilst the further signals for driving the TAP function are used in a shared mode among the various components. Preferably, associated with the aforesaid clocks is a pull-down function for selectively blanking the respective clocks in conditions of non-use. In a preferred way, the aforesaid dedicated clocks are generated on board the chip.
Abstract: Cyclic peptides and compositions comprising such cyclic peptides are provided. The cyclic peptides comprise a cadherin cell adhesion recognition sequence HAV. Methods for using such peptides and compositions for modulating cadherin-mediated cell adhesion in a variety of contexts are also provided.
Abstract: A method for manufacturing a MOS transistor integrated into a chip of semi-conductive material comprising a first and a second active region which extend from the inside of the chip to a surface of the chip. The method comprises the steps of: a) forming a layer of insulating material on the surface of the chip and depositing a layer of conductive material on said insulating layer, b) defining an insulated gate electrode of the transistor, from said superimposed insulating and conductive layers, c) defining, from said superimposed insulating and conductive layers, an additional structure arranged on a first surface portion of the first active region, and d) placing between the insulated gate electrode and the additional structure a dielectric spacer placed on a second surface portion of the first active region.
Abstract: An electrically alterable semiconductor memory comprises at least two substantially independent memory banks, and a first control circuit for controlling operations of electrical alteration of the content of the memory. The first control circuit permits the selective execution of an operation of electrical alteration of the content of one of the at least two memory banks. The memory also comprises second control circuit that permits, simultaneously with said operation of electrical alteration of the content of one of the at least two memory banks, a burst mode, page mode, or standard read operation for reading the content of the other memory bank.
Type:
Grant
Filed:
July 28, 2000
Date of Patent:
June 28, 2005
Assignee:
STMicroelectrics S.r.l.
Inventors:
Lorenzo Bedarida, Antonino Geraci, Mauro Sali, Simone Bartoli
Abstract: A voltage regulator with quick response includes: an output terminal supplying a regulated voltage; and at least a first boost circuit, controlled for alternately accumulating a first charge in a first operating condition and supplying the first charge to the output terminal in a second operating condition. In addition, the first boost circuit is provided with a compensation stage supplying the output terminal with a second charge substantially equal to the first charge, when the first boost circuit is in the first operating condition.
Type:
Grant
Filed:
June 26, 2003
Date of Patent:
June 21, 2005
Assignee:
STMicroelectronics S.r.l.
Inventors:
Nicola Del Gatto, Vincenzo Dima, Carla Poidomani, Carmelo Chiavetta
Abstract: A wind power facility having a plurality of wind power installations, the wind power installations connected to a current voltage network into which the electrical current generated is fed or delivered that, independent of the currently prevailing amount of wind and the active power that is thus available from the wind power installation, a constant apparent power is always delivered into the network. A device for regulating the power to be delivered to a current voltage network is provided so that the regulation is so adjusted to have a constant apparent power always fed to the network.
Abstract: An MOS electronic device is formed to reduce drain/gate capacity and to increase cutoff frequency. The device includes a field insulating layer that covers a drain region, delimits an active area with an opening, houses a body region in the active area, and houses a source region in the body region. A portion of the body region between drain and source regions forms a channel region. A polycrystalline silicon structure extends along the edge of the opening, partially on the field insulating and active layers. The polycrystalline silicon structure includes a gate region extending along a first portion of the edge on the channel region and partially surrounding the source region and a non-operative region extending along a second portion of the edge, electrically insulated and at a distance from the gate region.
Type:
Grant
Filed:
September 9, 2002
Date of Patent:
June 14, 2005
Assignee:
STMicroelectronics S.r.l.
Inventors:
Riccardo Depetro, Anna Ponza, Antonio Gallerano