Patents Represented by Attorney, Agent or Law Firm Istrate Ionescu
  • Patent number: 6667487
    Abstract: A containment apparatus for containing a cloud of charged particles comprises a cylindrical vacuum chamber having a longitudinal axis. Within the vacuum chamber is a containment region. A magnetic field is aligned with the longitudinal axis of the vacuum chamber. The magnetic field is time invariant and uniform in strength over the containment region. An electric field is also aligned with the longitudinal axis of the vacuum chamber and the magnetic field. The electric field is time invariant, and forms a potential well over the containment region. One or more means are disposed around the cloud of particles for inducing a rotating electric field internal to the vacuum chamber. The rotating electric field imparts energy to the charged particles within the containment region and compress the cloud of particles.
    Type: Grant
    Filed: January 31, 2003
    Date of Patent: December 23, 2003
    Assignee: The United States of America as represented by the Administrator of the National Aeronautics and Space Administration
    Inventors: William Herbert Sims, III, James Joseph Martin, Raymond A. Lewis
  • Patent number: 6501810
    Abstract: A receiver for receiving synchronized digital transmissions organized in frames, each frame having a frame start, has a clock for generating pulses at time intervals with respect to a time reference and a counter for generating a count of the time intervals with respect to the time reference. A/D converters sample the digital transmission using the pulses from the clock. A cyclic prefix correlator detects the frame start during a count corresponding to an A/D sample. This count is indicative of the time interval during which the frame start was detected with respect to the reference. A memory is provided for storing a plurality (typically 36) counts indicative of the time interval during which the frame start was detected. A pointer is generated from the counts stored in memory. The pointer is indicative of a projected time interval during which a future frame start is expected to arrive.
    Type: Grant
    Filed: October 13, 1998
    Date of Patent: December 31, 2002
    Assignee: Agere Systems Inc.
    Inventors: Mohammad Rez Karim, Robert Louis Cupo, Mohsen Sarraf, Mohammad Zarrabizadeh
  • Patent number: 6314545
    Abstract: The element to be simulated is divided into regions, and each region is further divided into a plurality of quadrature nodes. Pairs are formed for all the quadrature nodes. Green's functions are computed and stored for the pairs. Each of the pairs is allocated to either the far field or the near field for purposes of simulation in accordance with a criterion. A Gaussian quadrature is computed for the pairs allocated to the far field while a high order quadrature is computed for those allocated in the near field. The component simulation is arrived after combining information derived from the Gaussian quadrature and the high order quadrature into a matrix which is then solved to obtain the charge distribution. Summation of the charges thus obtained yields the capacitance of the element. The high order quadrature is computed using a plurality of basis functions. The basis functions, denoted &psgr;ik(r′), are 1,x,y,x2,xy,y2. The basis functions are used to compute a set of weights vjk.
    Type: Grant
    Filed: November 6, 1998
    Date of Patent: November 6, 2001
    Assignee: Agere Systems Guardian Corporation
    Inventors: Sharad Kapur, David Esley Long
  • Patent number: 5953509
    Abstract: An telephone media processing server is described having clock pulse steering circuit for steering clock pulses to a plurality of digital processors under control of a main processor. Other signals, such as a frame clock, for generating frame pulses, address and data lines are distributed using single conductors connected to output pins of a control processor. Typically, more than eight signal processors partitioned in a plurality of groups are interfaced to a single main processor. Each group of signal processors has a clock input controlled by the clock steering circuit. A main processor has a data port pin, an address port pin, and a switching command output connected to the clock pulse steering means for steering clock pulses to each group of processors. The signal processors set the data pin and address pin to a high impedance when the clock input is inactive. An example using the TMS320C5x processor is detailed.
    Type: Grant
    Filed: May 8, 1997
    Date of Patent: September 14, 1999
    Assignee: Periphonics Corporation
    Inventors: Larry Ciccarelli, Robert Pinter, Kenneth J. Rivalsi, Bosah Erike
  • Patent number: 5274345
    Abstract: A SAW reflector structure located between multiple interdigitated generator/receivers located on a piezo-electric substrate forming a ladder type SAW device is described. The reflector structure reduces both reflections due to mechanical-electrical loading from the physical presence of generator/receiver fingers without using a split finger arrangement as well as reflections due to the regenerated reflection from the generator/receiver. The reflector has a first acoustic phase center. The generator/receiver has a second acoustic phase center, a regenerated voltage coefficient of reflection, r.sub.e and a mechanical-electrical loading coefficient of reflection, r.sub.m. The reflector is used for simultaneously reflecting both regenerated and mechanical-electrical loading induced reflections from the generator/receiver. The reflector is sized for a strength of reflection equal to the square root of the sum of the regenerated and mechanical-electrical loading reflections squared.
    Type: Grant
    Filed: May 13, 1992
    Date of Patent: December 28, 1993
    Assignee: Andersen Laboratories
    Inventor: John Gau