Abstract: A stack type flip-chip package that utilizes a redistribution circuit on the back of a chip to serve as a bridge for connecting with other chips. The package includes at least a substrate, a first chip, a second chip, some underfill material and some packaging material. The substrate has a plurality of bump contacts and a plurality of line contacts thereon. The first chip has an active surface with a plurality of first bonding pads thereon. The back surface of the first chip has a redistribution circuit. The redistribution circuit has a plurality of bump pads and a plurality of line pads thereon. The second chip has an active surface with a plurality of second bonding pads thereon. Bumps are positioned between the bump contacts and the first bonding pads and between the bump pads and the second bonding pads. Conductive wires connect the line contacts and the line pads. The underfill material fills the space between the chip and the substrate and the gap between the first and the second chips.
Type:
Grant
Filed:
April 23, 2002
Date of Patent:
July 27, 2004
Assignee:
Advanced Semiconductor Engineering, Inc.
Abstract: A method of forming a solid inter-layer conductive rod. A printed circuit board comprising an insulating core layer, a first conductive layer and a second conductive layer is provided. The insulating core layer is sandwiched between the first conductive layer and the second conductive layer. A first opening that exposes a portion of the insulating core layer is formed in the first conductive layer. The exposed insulating core layer is removed by laser drilling to form a second opening that exposes a portion of the second conductive layer. An electroplating process is conducted using the second conductive layer as a negative electrode so that conductive material solidly fills the first opening and the second opening to form a solid conductive rod.