Abstract: A wellbore apparatus adapted to be disposed in a wellbore includes a perforator adapted for perforating a formation penetrated by the wellbore and producing a wellbore fluid from the formation, a drill stem test string connected to the perforator, the drill stem test string including standard drill stem test equipment, such as a test valve and a reversing valve, and a drill pipe connected to the drill stem test string. When the wellbore fluid produced from the formation and entering the test valve fails to have enough natural formation pressure to travel uphole through the drill pipe to a surface of the wellbore, the wellbore fluid must be pumped uphole. A progressing cavity pump is connected to the drill pipe. More particularly, the cavity pump includes a stator, and the stator is connected to the drill pipe. A rotor of the cavity pump is enclosed by the stator and is connected to a sucker rod and a drive head.
Abstract: A method and apparatus for transmitting information relating to the operation of an electrical device disposed in a borehole, in which information picked up by at least one downhole sensor is conveyed to surface reception means via the wire connection connecting said device to electrical power supply means on the surface, the invention being characterized in that said wire connection is inductively coupled firstly with said sensor and secondly with said reception means.
Abstract: Prior to pumping completion brine fluid into a wellbore, an additive comprising two percent (2%) of a 0.25% solution of polyacrylamide is blended into the completion brine fluid thereby producing a treated brine fluid. This blending would be performed in tanks at the wellsite. The treated brine fluid is then pumed into the wellbore. In addition, or in the alternative, a new perforating gun stores the polyacrylamide additive composition. When the perforating gun detonates, the additive is disbursed into the completion brine fluid disposed in the annulus of the wellbore. For example, the new perforating gun may include a plurality of shaped charges coated with a lacquer of the polyacrylamide additive, or it may include one or more containers which contain the polyacrylamide additive. When the brine completion fluid is pumped into the wellbore annulus, a detonation wave conducts in a detonating cord of the perforating gun. The detonation wave passes through each of the containers.
Type:
Grant
Filed:
June 28, 1994
Date of Patent:
June 6, 1995
Assignee:
Schlumberger Technology Corporation
Inventors:
Erik B. Nelson, Clifford L. Aseltine, James E. Brooks
Abstract: The performance of a multi-microprocessor implemented data processing system that emulates a mainframe system is enhanced and optimized in view of space and power constraints for purposes of address translation by providing RAM-based storage means of predetermined depth and width to function as a page address table. The storage means depth is set to at least provide bit space to represent the total number of fixed size pages possible in a given virtual memory space. The width of the storage means is set to at least provide bit space to represent the largest page number that might be encountered in the available real memory and to accommodate a predetermined number of bits that flag information pertinent to translation and system performance. Circuit means, including microcode, is provided for initializing and updating the contents of the storage means as required.
Type:
Grant
Filed:
September 26, 1986
Date of Patent:
December 22, 1987
Assignee:
International Business Machines Corporation
Inventors:
David L. Livingston, Daniel J. Sucher, Bruce M. Walk
Abstract: A masking circuit for a multiprocessor system is disclosed. The masking circuit senses the existence and type of commands stored in the command status registers associated with the system processors. Masking begins if it is determined that information needed by one processor is located in the cache memory of another processor and is to be flushed to the main memory, which is accessible by the first processor. The masking circuit masks the command present in the command status register associated with the first processor, for the first processor to access the main memory, until after the information has been flushed from the cache to the main memory. The first processor is thus prevented from accessing the main memory until after the information has been flushed thereto.
Type:
Grant
Filed:
October 24, 1984
Date of Patent:
December 15, 1987
Assignee:
International Business Machines Corporation
Inventors:
Patrick F. Dutton, Earl W. Jackson, Jr.