Patents Represented by Attorney J. H. Fox
  • Patent number: 5043992
    Abstract: A laser driver includes a reference circuit, which may be a bandgap reference, mounted in thermal contact with the laser. The reference produces a current component Iptat that is proportional to the absolute temperature. The modulation current is proportional to Iptat, which slowly with temperature, up to a certain junction temperature (e.g., 65 to 70 degrees C.). Above that temperature, the modulation current increases more rapidly by adding an additional current component Icomp. This provides for the required increase in modulation current to compensate for temperature variations in the laser output. This technique allows the laser to be operated without cooling (as by a thermoelectric cooler) in many applications. The laser driver may optionally include circuitry to provide a bias current, which may be controlled by a backface monitor or threshold detector.
    Type: Grant
    Filed: October 6, 1989
    Date of Patent: August 27, 1991
    Assignee: AT&T Bell Laboratories
    Inventors: James J. Royer, Kalpendu R. Shastri
  • Patent number: 5003361
    Abstract: A dynamic memory cell comprises a storage transistor and an access transistor. The gate of the storage transistor is utilized as storage capacitor electrode, and is connected to its source by a high resistor. The drain of the storage is connected to a source of electrical potential (e.g., V.sub.CC). The access transistor connects the source of the storage transistor to a bit line. This arrangement multiplies the effective capacitance of the gate storage capacitor, reducing the area required and hence making the structure more compact than a typical inactive (one transistor) DRAM cell. In a preferred embodiment, the resistor is formed to overlie the storage transistor, and the drain of the storage transistor is connected to V.sub.CC by means of the sidewall of a trench formed in the semiconductor substrate.
    Type: Grant
    Filed: June 13, 1989
    Date of Patent: March 26, 1991
    Assignee: AT&T Bell Laboratories
    Inventor: Loren T. Lancaster
  • Patent number: 4999529
    Abstract: An integrated circuit input buffer is adapted to operate at either of two input levels, typically either TTL or CMOS logic levels. This is accommplished by switching an additional transistor (e.g. 15) into a path between the output node (e.g. 12) and a power supply voltage (e.g. V.sub.DD), thereby changing the ratio of the pull-up to pull-down devices. The desired input level may be selected after the manufacture of the device, as by applying a voltage to a package terminal, or by programming a register during operation of the integrated circuit.
    Type: Grant
    Filed: June 30, 1989
    Date of Patent: March 12, 1991
    Assignee: AT&T Bell Laboratories
    Inventors: James V. Morgan, Jr., Glen E. Offord
  • Patent number: 4990802
    Abstract: An integrated circuit obtains improved protection of output buffers against damage from electrostatic discharge (ESD). Each output buffer is connected to its bondpad by means of a resistor, and protective clamping diodes are disposed around the periphery of the bondpad. It has been found that a suitably sized resistor allows the protective diodes to discharge an ESD event before damage to the buffer occurs, by reducing current flow through the buffer, without significantly limiting performance.
    Type: Grant
    Filed: June 19, 1990
    Date of Patent: February 5, 1991
    Assignee: AT&T Bell Laboratories
    Inventor: Yehuda Smooha
  • Patent number: 4887135
    Abstract: A self-aligned one transistor-capacitor memory cell is provided which uses an n-channel MOS transistor having separate drain and source regions with a first level polysilicon conductor coupled to the top plate of the capacitor and separate second level polysilicon conductors coupled to the gate and drain of the transistor. A reduction in a dimension of the memory cell is acheived compared to a similar memory cell which uses only one level of conductors.
    Type: Grant
    Filed: January 24, 1985
    Date of Patent: December 12, 1989
    Assignee: American Telephone and Telegraph Company, AT&T Bell Laboratories
    Inventors: Glen T. Cheney, Howard C. Kirsch, James T. Nelson, James H. Stefany
  • Patent number: 4886765
    Abstract: Silicides are important for submicron VLSIC technology. Problems have been found in forming silicides by known techniques involving simply depositing a metal film and heating that metal to form a silicide layer. This invention solves the problems through recognition that polymeric contamination can be left on the surface from commonly-used previous reactive ion etch steps, and removes any such contamination to metal deposition by the additional step of heating in dry oxygen at a low temperature, such as 800 degrees Centigrade, before the contamination has been significantly hardened.
    Type: Grant
    Filed: October 26, 1988
    Date of Patent: December 12, 1989
    Assignee: American Telephone and Telegraph Company, AT&T Bell Laboratories
    Inventors: Min-Liang Chen, Chung W. Leung, Chih-Yuan Lu, Nun-Sian Tsai