Abstract: In a microprogram-controlled processor, having an additional operating mode in which particular functions can be executed under direct hardware control, a mode latch signals whether microprogram instructions or directly controlled macro instructions are to be executed. The macroprogram instructions are conventionally executed. For the execution of directly controlled macro instructions, a control storage supplies a hardware control word associated with the macro instruction to be directly executed. The hardware control word contains a mode control bit for signalling that the direct hardware control mode is to be executed. The remainder of the hardware control word contains a plurality of direct control bits, each of which directly controls a hardware function. In an alternative embodiment multiple hardware control words are employed.
Type:
Grant
Filed:
June 2, 1983
Date of Patent:
December 23, 1986
Assignee:
International Business Machines Corporation
Inventors:
Herbert Chilinski, Klaus J. Getzlaff, Johann Hajdu, Franz J. Raeth