Patents Represented by Attorney, Agent or Law Firm J. Scott Denko
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Patent number: 7066741Abstract: The present invention provides a flexible circuit connector for electrically coupling IC devices to one another in a stacked configuration. Each IC device includes: (1) a package having top, bottom, and peripheral sides; and (2) external leads that extend out from at least one of the peripheral sides. In one embodiment, the flexible circuit connector comprises a plurality of discrete conductors that are adapted to be mounted between the upper side of a first package and the lower side of a second package. The flexible circuit connector also includes distal ends that extend from the conductors. The distal ends are adapted to be electrically connected to external leads from the first and second packages to interconnect with one another predetermined, separate groups of the external leads. In this manner, individual devices within a stack module can be individually accessed from traces on a circuit card.Type: GrantFiled: May 30, 2003Date of Patent: June 27, 2006Assignee: Staktek Group L.P.Inventors: Carmen D. Burns, David Roper, James W. Cady
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Patent number: 6618257Abstract: Provided is a system and method for selectively stacking and interconnecting integrated circuit devices having a data path of n-bits to create a high-density integrated circuit module having a data path of greater than n-bits. Integrated circuits are vertically stacked one above the other. Where the constituent IC elements have a data path of n-bits in width, a module devised in accordance with a preferred embodiment of the present invention presents a data path 2n-bits wide. In a preferred embodiment, an interconnection frame comprised of printed circuit board material is disposed about two similarly oriented ICs to provide interconnectivity of the constituent ICs and concatenation of their respective data paths. An array of clip-leads or other connectors are appended to module connection pads to provide lead-like structures for connection of the module to its operating environment.Type: GrantFiled: July 27, 2001Date of Patent: September 9, 2003Assignee: Staktek Group, L.P.Inventors: James Cady, David L. Roper, James G. Wilder, Julian Dowden, Jeff Buchle
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Patent number: 6608763Abstract: A system and method for selectively stacking and interconnecting individual integrated circuit devices to create a high density integrated circuit module. Connections between stack elements are made through carrier structures that provide inter-element connections that substantially follow an axis that is substantially perpendicular to the vertical axis of the stack. The carrier structure provides connection between elements through conductive paths disposed to provide connection between the foot of an upper IC element and the upper shoulder of the lower IC element. This leaves open to air flow most of the vertical transit section of the lower lead for cooling while creating an air gap between elements that encourages cooling airflow between the elements of the stack. A method for creating stacked integrated circuit modules according to the invention is provided.Type: GrantFiled: September 15, 2000Date of Patent: August 19, 2003Assignee: Staktek Group L.P.Inventors: Carmen D. Burns, James G. Wilder, Julian Dowden
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Patent number: 6572387Abstract: The present invention provides a flexible circuit connector for electrically coupling IC devices to one another in a stacked configuration. Each IC device includes: (1) a package having top, bottom, and peripheral sides; and (2) external leads that extend out from at least one of the peripheral sides. In one embodiment, the flexible circuit connector comprises a plurality of discrete conductors that are adapted to be mounted between the upper side of a first package and the lower side of a second package. The flexible circuit connector also includes distal ends that extend from the conductors. The distal ends are adapted to be electrically connected to external leads from the first and second packages to interconnect with one another predetermined, separate groups of the external leads. In this manner, individual devices within a stack module can be individually accessed from traces on a circuit card.Type: GrantFiled: March 19, 2002Date of Patent: June 3, 2003Assignee: Staktek Group, L.P.Inventors: Carmen D. Burns, David Roper, James W. Cady
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Patent number: 6470628Abstract: A shelf extends inwardly to the gutter trough from the front containment wall of a gutter trough to cooperate with a lip of a cavity structure of a hanger to provide structural stability and optional deflector attachment facility in a rain collection and diversion system. The hanger cavity structure has a containment lip a portion of which extends over a portion of the inwardly extending shelf of the front containment wall to allow functional water bearing capacity of the trough and a lengthened back trough wall to accommodate hanger placement and deflector inclination. The hanger can include deflector-mating cavities that open toward each other to allow compression attachment of the deflector. In a preferred embodiment, the deflector may be attached to a formed trough in which hangers are positioned to allow movement of the trough-deflector combination as a unit from the machine-site to the installation location on the structure. Associated installation methods are provided.Type: GrantFiled: September 25, 2001Date of Patent: October 29, 2002Assignee: Senox CorporationInventor: Arnold Bruce Walters
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Patent number: 6462408Abstract: A system and method for selectively stacking and interconnecting individual integrated circuit devices to create a high-density integrated circuit module. In a preferred embodiment, conventional thin small outline packaged (TSOP) memory circuits are vertically stacked one above the other. The constituent IC elements act in concert to provide an assembly of memory capacity approximately equal to the sum of the capacities of the ICs that constitute the assembly. The IC elements of the stack are electrically connected through individual contact members that connect corresponding leads of IC elements positioned adjacently in the stack. In a preferred embodiment, the contact members are composed of lead frame material. Methods for creating stacked integrated circuit modules are provided that provide reasonable cost, mass production techniques to produce modules.Type: GrantFiled: March 27, 2001Date of Patent: October 8, 2002Assignee: Staktek Group, L.P.Inventor: James Douglas Wehrly, Jr.
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Patent number: 6453622Abstract: A shelf extends inwardly to the gutter trough from the front containment wall of a gutter trough to cooperate with a lip of a cavity structure of a hanger to provide structural stability and optional deflector attachment facility in a rain collection and diversion system. The hanger cavity structure has a containment lip a portion of which extends over a portion of the inwardly extending shelf of the front containment wall to allow functional water bearing capacity of the trough and a lengthened back trough wall to accommodate hanger placement and deflector inclination. The hanger can include deflector-mating cavities that open toward each other to allow compression attachment of the deflector. In a preferred embodiment, the deflector may be attached to a formed trough in which hangers are positioned to allow movement of the trough-deflector combination as a unit from the machine-site to the installation location on the structure. Associated installation methods are provided.Type: GrantFiled: June 12, 2001Date of Patent: September 24, 2002Assignee: Senox CorporationInventor: A. B. Walters
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Patent number: 6404662Abstract: The RAMBUS compatible configuration of the present invention is achieved by stacking one of the two modules in the stacked configuration in an upside-down position with respect to the other. This way, the corresponding electrical leads of each memory module will extend on opposite sides of the stacked package and will be securably connected to vertical rails. The vertical rails are electrically and securably connected to the bonding pads which electrically connect to the RAMBUS signal channel. In this embodiment, the electrical leads of one memory module electrically connect to the signal channel at points located on one side of the stacked package and the electrical leads of the other memory module connect to the signal channel at points located on the opposite side of the stacked package. The resulting distance between the points of contact between corresponding leads of each memory module in the stacked package is sufficient to satisfy the requirements of the RAMBUS signal channel.Type: GrantFiled: March 7, 2001Date of Patent: June 11, 2002Assignee: Staktek Group, L.P.Inventors: James W. Cady, Russell Rapport
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Patent number: 6310392Abstract: Integrated circuit modules made in accordance with the methods of the present invention have multiple Ball-Grid Array (BGA) packages mounted to a substantially planar support substrate. Each package is inclined at an angle to the support substrate and partially overlaps another package. The first package or row of packages overlaps a wedge that is provided for support. A flexible substrate is mounted to each BGA package and has a portion that extends away from the package to adhere to the support substrate, for communication between each package and signal lines on the support substrate. Optionally, a portion of the substrate that extends away from the integrated circuit package can be bent back at a 180° angle to allow the pads on the top surface of the flexible substrate to attach to mating pads on the support substrate.Type: GrantFiled: December 28, 1998Date of Patent: October 30, 2001Assignee: Staktek Group, L.P.Inventor: Carmen D. Burns
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Patent number: 6288907Abstract: A high density integrated circuit module having complex electrical interconnection is described, which includes a plurality of stacked level-one integrated circuit devices, wherein each level-one device includes an integrated circuit die and a plurality of electrical leads extending from the die; and a plurality of non-linear rails adapted to electrically and thermally interconnect selected leads of selected stacked level-one devices within the module, wherein at least some of the plurality of non-linear rail include a lead interconnect portion which is adapted to at most partially surround and receive a selected lead from one of the stacked level-one devices. Other embodiments include TSOP modules having leads reduced in width to allow additional selected non-linear rails to interconnect with select leads in the module. Strain relief for the rail/circuit board substrate connection in harsh environment applications is also provided.Type: GrantFiled: June 30, 1999Date of Patent: September 11, 2001Assignee: Staktek Group, L.P.Inventor: Carmen D. Burns
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Patent number: 6282210Abstract: A clock driver providing a clock signal, from an input clock signal, that has instantaneously selectable phase and methods for synchronizing data transfers in a multi-signal bus communication system. A clock driver of the present invention generates an output clock signal from an input clock signal having a periodic wave form and provides the flexibility for selecting or changing the magnitude of the phase-offset of the output clock signal, in relationship to the input clock signal, for desired clock periods and optionally desired half-clock periods. A method is provided for the self-calibration of critical delay elements. The present invention also includes a method for synchronizing data transfers between a bus master device that is clocked by a system clock and a plurality of synchronous DRAM devices (SDRAM) that are clocked by a local clock; the local clock has, in relationship to the system clock signal, a first phase-offset for read cycles and a second phase-offset for write cycles.Type: GrantFiled: August 12, 1998Date of Patent: August 28, 2001Assignee: Staktek Group L.P.Inventors: Russell Rapport, Jeff Buchle
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Patent number: 6205654Abstract: The present invention provides a method and apparatus for fabricating densely stacked ball-grid-array packages into a three-dimensional multi-package array. Integrated circuit packages are stacked on one another to form a module. Lead carriers provide an external point of electrical connection to buried package leads. Lead carriers are formed with apertures that partially surround each lead and electrically and thermally couple conductive elements or traces in the lead carrier to each package lead. Optionally thin layers of thermally conductive adhesive located between the lead carrier and adjacent packages facilitates the transfer of heat between packages and to the lead carrier. Lead carriers may be formed of custom flexible circuits having multiple layers of conductive material separated by a substrate to provide accurate impedance control and providing high density signal trace routing and ball-grid array connection to a printed wiring board.Type: GrantFiled: December 28, 1998Date of Patent: March 27, 2001Assignee: Staktek Group L.P.Inventor: Carmen D. Burns
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Patent number: 6196851Abstract: A reorientable electrical outlet employs rotatable female electrical receptacle(s) to allow rotation of a male plug while connected in the rotatable female electrical receptacle. The disclosed technique is adaptable to a variety of rotatable female electrical receptacles ranging from typical residential two receptacles, polarized/grounded receptacles, and non-grounded receptacles. The prongs of a male plug may be inserted into the rotatable female electrical receptacle and rotated to desired positions and remain substantially fixed. Male plug interference with other electrical receptacles is minimized.Type: GrantFiled: December 9, 1999Date of Patent: March 6, 2001Assignee: Intelliglobe, Inc.Inventors: Kimberly R. Gerard, Curtis Roys
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Patent number: 6194247Abstract: The present invention provides a method for fabricating modified integrated circuit packages that are ultra-thin and resist warping. The integrated circuit packages are made thinner by removing some of the casing material uniformly from the upper and lower major surfaces of the integrated circuit package. To prevent the resulting ultra-thin integrated circuit package from warping, a thin layer of material with a coefficient of thermal expansion less than that of silicon is mounted to the upper major surface of the package after some of the casing material has been removed uniformly from the upper major surface. Also, a thin layer of material with a coefficient of thermal expansion greater than that of silicon may be mounted to the lower major surface of the package after some of the casing material has been removed uniformly from the lower major surface. The result is an ultra-thin integrated circuit package that is thermally and mechanically balanced to prevent warping.Type: GrantFiled: September 23, 1998Date of Patent: February 27, 2001Assignee: Staktek Group L.P.Inventors: Carmen D. Burns, James W. Cady, Jerry M. Roane, Phillip Randall Troetschel
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Patent number: 6190939Abstract: An integrated circuit package for improved warp resistance and heat dissipation is described. The LOC package includes: an integrated circuit die having an upper, active face, and a multi-layered, substantially planar lead frame mounted to the active face of the die, where the lead frame is preferably comprised of layers configured as Cu/INVAR/Cu or Cu/Alloy 42/Cu. The choice of the middle layer of the lead frame is selected to minimize the warping forces on the package such that the coefficient of thermal expansion of the composite lead frame approximates that of silicon. The copper layers of the lead frame provide improved heat dissipation.Type: GrantFiled: July 14, 1998Date of Patent: February 20, 2001Assignee: Staktek Group L.P.Inventor: Carmen D. Burns
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Patent number: 6168970Abstract: Thin and durable level-one and level-two integrated circuit packages are provided. A thin and durable level-one package is achieved in one method involving a molding technique of evenly applying molding compound to an integrated circuit die element. The casing surrounding a die element may be reduced or eliminated in part to thin the level-one package provided any necessary steps are taken to ensure the integrity of the package. Moisture-barriers, as an example, may be provided to the upper and/or lower surfaces of the thin level-one package. Additionally, a thin level-one package may also be constructed with one or more metal layers to prevent warpage. These level-one packages may be aligned in a stacked configuration to form a thin and durable horizontal level-two package. Various thermal conductors may be thermally coupled to the level-two package to help dissipate heat.Type: GrantFiled: November 5, 1999Date of Patent: January 2, 2001Assignee: Staktek Group L.P.Inventor: Carmen D. Burns
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Patent number: 5757351Abstract: The present invention uses temporary storage of data sub-frames to obviate the need for a multiplicity of driver circuit packages and eliminate the traditional one-to-one association of driver circuit channels with selected data electrodes in the addressing of a flat panel display matrix. Display data signals are serially induced along a controlled velocity signal propagation transmission line to create signal profiles representative of data sub-frames, a data frame being the amount of data required to address a single display row. Individual informational "bits" of the data sub-frame are captured, in timed sequence or in parallel, from the signal profile by the multiplexer assemblies tapped into the transmission line at particular sites along its length. When the assemblies are enabled, the signal profile along the transmission line is exposed to a charge storage capability. The informational bits of the signal profile representing the sub-frame are, consequently, captured.Type: GrantFiled: December 11, 1995Date of Patent: May 26, 1998Assignee: Off World Limited, Corp.Inventors: Jun Lin, Homer L. Webb, Linda S. Walling, Barry E. Young, J. Scott Denko
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Patent number: 5519414Abstract: This invention relates to an apparatus and method for creating visual images on a display area. This invention uses the selective convergence of traveling electrical signals to cause selected display locations located across a display area to illuminate or to change their visual appearances. The apparatus of the invention includes a display mechanism that either illuminates or changes its visual appearance when activated, at least one signal propagation path that directs the propagation of the signals across the display area, and signal control equipment for selectively transmitting the signals. In a preferred embodiment first and second signal propagation paths provide unique propagation paths that pass through each of a the display locations across the area of the display.Type: GrantFiled: February 19, 1993Date of Patent: May 21, 1996Assignee: Off World Laboratories, Inc.Inventors: Robert J. Gold, Dan E. Jennings, Homer L. Webb