Abstract: A repeat cycle delay timer in which the on-delay and off-delay periods are individually selectable by individual adjustment of two pulse oscillators respectively associated therewith. The pulses are alternately applied to a pulse counter which produces an output signal after a preselected number of pulses have been counted for that period. The counter then counts pulses from the other oscillator until the end of the other delay period. Different counter outputs may also be selected to produce simultaneous adjustment of both the on-delay and the off-delay periods.