Patents Represented by Attorney James A. Hogan & Hartson LLP Pinto

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  • Apparatus for delivering precise traps and interrupts in an out-of-order processor
    Patent number: 6049868
    Abstract: In a processor executing instructions speculatively or out-of-order, an apparatus for tracking traps, exceptions, and interrupts within the processor. A table stores front-end and back-end traps associated with an instruction, and an instruction retirement module retires the instructions in order if no traps were associated with older instructions in the processor. In this way, the proper trap sequence of events is maintained so that traps can be properly handled.
    Type: Grant
    Filed: June 25, 1997
    Date of Patent: April 11, 2000
    Assignee: Sun Microsystems, Inc.
    Inventor: Ramesh Panwar