Abstract: An image system which captures, along with the images, information defining both the position and the orientation of the camera along with the distance to the subject. A video camera is attached to three accelerometers, two gyroscopes, and a rangefinder. Data gathered from these devices and defining the pitch, yaw, and roll of the camera, the camera's acceleration, and the distance to the subject is captured and recorded along with video images. The video images are later stored within a computer's data base along with data defining the position and orientation of the camera and the distance to the subject for each image, this latter data being computed from the captured data. The images may then be presented to the user in a three-dimensional display in which the user can navigate through the images using a joystick device, with the images located in positions corresponding to the positions in space of the objects that were imaged.

Abstract: An image system captures, along with the images, information defining both the position and the orientation of a camera along with the distance to the subject. A video camera is attached to three accelerometers, two gyroscopes, and a rangefinder. Data gathered from these devices and defining the pitch, yaw, and roll of the camera, the camera's acceleration, and the camera's distance to the subject is captured and recorded along with the video images. The video images are later stored within a computer's database along with data defining the position and the orientation of the camera, and the distance to the subject for each image. The images may then be presented to a user in a three-dimensional display in which the user can navigate through the images using a joystick or a mouse.

Abstract: A computer system has a processing unit with suspend/resume capability, a memory, and a hard disk drive. In response to a first command from the processor, the hard disk drive sends its status to the processor and the processor stores it in the memory. In response to a second command from the processor, the hard disk accepts from the processor the status retrieved by the processor from the memory, and restores itself to this status. In an alternative embodiment, the hard disk drive response to the first command by storing its status on its own hard disk, and responds to the second command by restoring this status from the hard disk. In each case, an output line from the hard disk used to control a light emitting diode is also selectively used to create an interrupt to the processor which facilitates the systems entry into the suspend mode.

Abstract: A laptop computer system includes a protected mode microprocessor capable of operating in restricted and unrestricted modes, and an arrangement which in response to a predetermined condition saves information from the processor and then forcibly switches the processor to its unrestricted mode of operation. When running a multi-tasking operating system where an application program is being executed in a restricted mode, a suspend/resume operation can be carried out in which the system is substantially powered down and then powered back up, and will resume the interrupted application with the restricted mode back in effect. Further, set-up changes such as adjustment of the processor speed can be made without exiting the application program running in the restricted mode.

Abstract: A laptop computer system includes a protected mode microprocessor capable of operating in restricted and unrestricted modes, and an arrangement which in response to a predetermined condition saves information from the processor and then forcibly switches the processor to its unrestricted mode of operation. When running a multi-tasking operating system where an application program is being executed in a restricted mode, a suspend/resume operation can be carried out in which the system is substantially powered down and then powered back up, and will resume the interrupted application with the restricted mode back in effect. Further, set-up changes such as adjustment of the processor speed can be made without exiting the application program running in the restricted mode.

Abstract: A port replicator is disclosed that provides for the efficient connecting and disconnecting of peripheral devices to a computer. A replicator port connector is provided on a portable computer that duplicates the pins of a other peripheral connectors on the computers. The housing of the port replicator is attached by spring clips to the computer which covers the other peripheral connectors replicated by the port replicator. The replicated connectors are then reproduced on the connector housing. Cables for peripheral devices can remain connected to the connector housing but be connected to and disconnected from the computer in a single action.

Abstract: A computer system has a memory and has a processor coupled to the memory, the processor having an access control arrangement for delaying completion of a memory access until the occurrence of a control signal. A deterministic circuit coupled to the-processor and the memory has a register arrangement containing control information loaded by the processor, the deterministic circuit having a signal generation arrangement for generating the control signal. The signal generating arrangement includes a selective delay arrangement which can selectively delay generation of the control signal during an access to the memory by a time interval having a duration which is a function of the control information in the register arrangement.

Abstract: A port replicator is disclosed that provides for the efficient connecting and disconnecting of peripheral devices to a computer. A replicator port connector is provided on a portable computer that duplicates the pins of a other peripheral connectors on the computers. The housing of the port replicator is attached by spring clips to the computer which covers the other peripheral connectors replicated by the port replicator. The replicated connectors are then reproduced on the connector housing. Cables for peripheral devices can remain connected to the connector housing but be connected to and disconnected from the computer in a single action.

Abstract: A shared bus arbitration system is disclosed which provides logic allowing multiple processors to co-exist on a common bus. In the present invention, the host processor is isolated from the bus by a posted write array or write buffer. The arbitration system accepts bus lock and cycle signals when the processor writes a locked instruction to the posted write array and provides a bus lock signal to the bus when the locked instructions are written to the bus.

Abstract: In a digital tape recording system for video and sound signals, in which information in each track is stored in plural sectors having synchronizing preambles that aid in synchronizing the playback of the information, special preambles containing a frequency component that is lower than normal are used for the first sector of the first track in each video frame or field. The normal and special preambles are produced by passing the binary code". . . 01010101 . . . " (in the case of all but the first sector of each frame or field) or ". . . 011011011011 . . . " (in the case of the first sector) through a Miller Channel Code encoder to produce, in the first case, a synchronizing square wave fluctuating at one-fourth the bit presentation frequency, and in the second case, a synchronizing square wave fluctuating at one-sixth the bit presentation frequency.

Abstract: An evaluation unit accurately measures the elapsed time between two events. The two events mark the start and stop points of a switching device, such as a motor-operated valve, as it is switching between a first state and a second state. This elapsed time, when compared to a base-line elapsed time or a previously measured elapsed time, provides an indication as to whether the performance of the device has degraded to the point where maintenance or replacement of the switching devices required. The unit includes electro-optical means for individually sensing the occurrence of each event, logic means for selecting the occurrence of either event as the starting or stopping point for the time measurement, and a timing circuit for performing and displaying the time measurement.