Abstract: An instruction caching system comprises meta-instructions which are contained within the program being executed. A meta-machine, which is a small segment of software, executes the meta-instructions and passes control to the processor itself at appropriate times to execute blocks of instructions from the instruction cache.

Abstract: An improved method and system for instructing individuals as to the various breeds of animals and in the art of exhibition. An event board simulates true life circumstances which occur while exhibiting during a competition. Other devices are employed which instruct users as to the various aspects of exhibition and of dog breeds such that the information is presented in a manner which is enjoyable to the users. The game board indicia is presented in tracks or bands, with each band representing a different level of competition.

Abstract: An improved mounting system for surface mounted components is described. The mounting system of the present invention provides preparations for surface mounted components and the printed circuit substrate which render the resultant assembly highly resistant to stresses which occur due to thermal cycling. The printed circuit substrate is conditioned by removing selected areas of media surrounding the points of attachment between the surface mounted component and the printed circuit media. In addition, a spacing element is disposed between the surface mounted component and the printed circuit media to promote the formation of a virtual lead during assembly.

Abstract: A method and means for reducing noise in a GaAs FET oscillator circuit is described. The circuit of the present invention achieves low noise oscillator operation by driving the gate input of the GaAs FET oscillator circuit with a source of voltage which exhibits a low impedance at baseband frequencies and driving the drain input with a source of current which exhibits a high impedance at said frequencies. The present invention further operates to control the D.C. voltage present on the drain terminal of the GaAs FET device regardless of the drain current, while simultaneously maintaining a constant D.C. drain current at some predetermined value which corresponds to optimum low-noise operation.

Abstract: A digital lock detector for a phase-locked loop accumulates out-of-lock pulses which are derived from a high frequency clock signal. The out-of-lock pulses are gated by an out-of-phase indicator signal and a pulse centered around the phase-locked loop output cycles to reduce the effect of relative phase jitter between the input and output signals of the phase-locked loop. The digital lock detector utilizes two counters in series which are reset independently to provide resistance to fading signal conditions. In addition, the lock detector circuit requires several consecutive long out-of-lock indications before an out-of-lock condition is indicated.

Abstract: A method and means for controlling telephone interconnect traffic on a trunked radio system is described. The present invention continuously monitors all types of communication traffic on the system and in response to an increasing dispatch access delay, reserves certain repeaters for dispatch use only during a predetermined period. The present invention also contemplates a system in which the number of simultaneous telephone interconnect calls permitted on the system during a predetermined period is dynamically altered in response to system loading. In addition, the present invention establishes a variable, periodically updated, maximum interconnect call length based on the current system dispatch access delay.

Abstract: An improved simulcast transmission in which a signal transmitted by a master station provides a reference frequency signal, as well as a voice and data path, is described. The system can be configured such that a master station can transmit AFSK data and voice or FSK data and voice. In either case, the remote transmitter will retransmit FSK and voice.

Abstract: Method and apparatus are provided for control of a dedicated data slot in a time-division multiplex system for both voice and data communications enabling equal access to the data slot, efficient data throughput and reliability.

Abstract: A paging station remote control system encoder is described. The paging system encoder generates signals in accordance with a predetermined signalling scheme comprising a series of tones and timed pauses and generated in response to control signals supplied either manually or by a paging terminal. The paging system encoder provides control signals which instruct a paging transmitter station to key in the analog or binary modulation mode or to switch from one mode to another without first dekeying the paging transmitter.

Abstract: An improved analog CMOS comparator circuit is described. The improved circuit incorporates an additional CMOS device in the output stage of a conventional differential comparator. The additional device compensates for current imbalances which occur at relatively high common mode voltages thus allowing the improved comparator to operate over a wider range of common mode input voltages.

Abstract: A circuit and technique for directing an adaptable antenna system is described. The invention is coupled to the output of an RF receiver configured to provide a data signal output, and evaluates the quality of the receiver data signal. The invention switches antennas when the signal quality deteriorates below a predetermined level.

Abstract: An adaptable homotropic antenna system for use with a portable communication transceiver is described. The antenna system can be used for reception or transmission and can be completely enclosed within the portable transceiver housing. The homotropic antenna system evaluates the quality of a received signal and if the signal is below a predetermined threshold level, an alternate antenna will be selected. The antenna system will continue to sample the available antennas until an antenna produces a signal of acceptable quality.

Abstract: A programmable bias circuit for use with a data limiter circuit is described. The limiter and bias circuit are coupled to a portable data receiver which is adapted to communicate in a coded system. Frequency disparities between a transmitted word sync signal and the portable data terminal local oscillator signal will cause a DC offset voltage in the received data signal. The programmable bias circuit is controlled by a decoder within the portable data terminal. If the terminal is in an idle state, the programmable bias circuit will be set to rapidly follow offset voltage shifts until a transmitted word sync signal has been detected. After word sync has been detected, a slower, more stable time constant circuit is programmably activated for the duration of the digital data message. The fast time constant circuit is activated at the end of the received data signal.

Abstract: An improved multiple frequency digital phase-locked loop circuit is described. The improved digital phase-locked loops utilizes a single circuit to effect both phase and frequency adjustments. The multiple frequency digital phase-locked loop effects phase adjustments by selectively combining or subtracting a reference clock signal with a derived programmable clock signal thereby generating a composite digital phase-locked loop clock signal. The multiple frequency provides frequency adjustments by selectively adding or subtracting pulses from the composite clock signal at a rate determined by a programmably controllable clock signal. The improved multifrequency digital phase-locked loop is suitable for use as a tone detector with the addition of a lock detector wherein the phase-locked loop can be programmed for a plurality of known operating frequencies.

Abstract: A unitary phase and frequency adjust network for use in a multiple frequency digital phase-locked loop circuit is described. The unitary phase and frequency adjust network utilizes a single circuit to effect both phase and frequency adjustments. The multiple frequency digital phase-locked loop effects phase adjustments by selectively combining or subtracting a reference clock signal with a derived programmable clock signal thereby generating a composite digital phase-locked loop clock signal. The phase and frequency adjust network effects frequency shifts by selectively adding or subtracting pulses from the composite clock signal at a rate determined by a programmably controlled clock signal.

Abstract: An improved multifrequency trunked, two-way communications system is provided in which a plurality of conventional single channel radio units are provided access. The system includes a predetermined number of information channels that are shared by a plurality of trunked stations. A trunked controller assigns one of the information channels to a requesting trunked mobile unit. The requesting trunked mobile unit is enabled to operate on the assigned channel in response thereto.The improved communications system includes a radio access link which enables the single channel radio units to operate on an assigned information channel in the same manner as the trunked remote stations. The radio access link provides the plurality of conventional remote stations automatic access to the trunked system without requiring any modification of the conventional remote stations, and likewise without modification of the trunked remote stations and trunked controller.

Abstract: An improved method and means of determining reflection coefficients that characterize an electrical signal that obtains characteristics of an all-zero inverse lattice filter. The reflection coefficients are obtained by filtering the signal, sample the filtered signal, obtaining the elements of a correlation array from the samples, initializing values of arrays forward residuals, backward residuals, and cross correlation of residuals, combining array elements to obtain a first reflection coefficient, removing from the forward, backward and cross-correlation arrays the effect of the first reflection coefficient, calculating from the revised arrays a second coefficient, and repeating the calculations to the desired order. In a second embodiment of the present invention, samples are selected from the digitized signal and multiplied by a windowing function.

Abstract: Improved method and apparatus in the form of coherent demodulators for MSK signal or other angle-modulated carrier signals of substantially constant amplitude and continuous phase are provided. The coherent demodulators include a frequency doubler, a first mixer for multiplying the frequency doubled signal with a half clock signal to produce a carrier term signal, a bandpass filter for filtering the carrier term signal and a divider coupled to the carrier bandpass filter to produce a coherent carrier signal. The half clock signal is generated by multiplying the frequency doubled signal with the filtered ouput signal of the carrier bandpass filter by a second mixer, and bandpass filtering the output signal of the second mixer to produce the half clock signal. The received binary data modulated signal and the generated coherent carrier signal are input to a quadrature detector for recovering the binary data.