Abstract: A method for generating an in-phase (I) output signal and a quadrature-phase (Q) output signal from an input signal reduces phase error in the I/Q generator by delaying-and-doubling an input signal to produce a Q output signal and delaying the input signal twice and subtracting the same from the input signal to produce an I output signal. The I/Q generator includes a first 90°-phase delay circuit receiving an input signal and outputting an intermediate Q signal; a second 90°-phase delay circuit receiving the intermediate Q signal and producing an intermediate I signal. It also includes a signal doubler receiving the intermediate Q signal and producing a Q output signal of twice the amplitude of the input signal at a 90° phase angle. Finally, the generator includes a signal differencer receiving the input signal and the intermediate I signal and producing an I output signal of substantially twice the amplitude of the input signal at a 0° phase angle.

Abstract: A method for reducing noise in a four-quadrant multiplier having first and second cross-coupled pairs of differential bipolar transistors, differential input current terminals connected with a first pair of common junctions of the respective pairs of differential transistors and the differential output current terminals cross coupled to form a second pair of common junctions of the respective pairs of differential transistors is described. The method includes providing a noise current path from the differential input current terminals to a bias voltage, the noise current path substantially bypassing the differential output current terminals when the gain of the multiplier is near zero.