Abstract: A localized cooling method allows the sequential alignment and soldering of one optical fiber at a time to a semiconductor package, while previously aligned and soldered optical fibers are held fixed. This method utilizes the mechanical property of a sharp melting point eutectic alloy solder or a pure metal solder for the fiber connections and is effective for multi-fiber optoelectronic packages demanding stability and high precision. A package design for optoelectronic components requiring multi-fiber alignment incorporates this feature of localized cooling internally. The localized cooling method and the novel package utilizing this method internally make it possible to eliminate the tilted angle optical fiber alignment problem by mounting tilted facet optical amplifier components at a predetermined offset angle.

Abstract: An integrated optical intensity modulator is constructed by cascading individual waveguide directional coupler sections, each having a primary and secondary waveguide and a pair of uniform electrodes. A modulator normally operating in an OFF state has a bar-type structure such that the primary waveguides form one complete and straight waveguide. An input optical signal applied to this modulator propagates straight through the device. Another modulator structure normally operating in an ON state has a cross-type configuration which operates such that the coupled signal from one coupler section serves as the input signal for a next section. Each modulator is driven from its normal state into an opposite state by applying a voltage to the electrodes for inducing changes in the refractive index profile. A plurality of the optical modulators are fabricated in parallel on an integrated optical wafer to form a high-density optical gate array.

Abstract: An optical space switch architecture is constructed from electro-optical gate arrays each comprised of a plurality of ultra-high-extinction optical intensity modulators which are in turn fabricated from cascaded directional waveguide coupler sections. Input optical signals are processed by 1-to-N passive splitter circuits for providing interim optical signals which are routed to the optical gtate arrays. Each interim signal is processed by an optical modulator and emerges, depending upon the activation of the particular gate, in either an ON or OFF state. The optical signals emerging from the gate arrays are routed to N-to-1 passive combiner circuits according to a connectivity configuration whereupon the incoming signals are combined before appearing at the output ports of the combiner circuits. Optical amplifiers are incorporated into the splitter and combiner circuits if power compensation is required.

Abstract: A 1.times.2 integrated optical switch with a high extinction ratio is obtained from the monolithic integration of three integrated waveguide couplers. The waveguide couplers are designed such that the output of the first waveguide coupler is directly coupled to the input of the other two integrated waveguide couplers by an integrated waveguide. Thus, the switch has two cascaded integrated waveguide couplers along each path from the single input to each of the two outputs. Only two pairs of electrodes are required by this design. The extinction ratio of this switch is the sum of the extinction ratios along an input-output path. Since integrated waveguide couplers are bidirectional, this switch can be used as a 2.times.1 switch by reversing the input and outputs.

Abstract: A hybrid design for rectangularly configured integrated optical matrix switches uses both 2.times.2 optical changeover switches and 2.times.2 optical shift switches to achieve significant reduction of crosstalk accumulation for a strictly nonblocking switch architecture. The 2.times.2 optical shift switches are novel two-stage switches which allow two connection paths to bypass each other with very little crosstalk in the crossover state. A crossbar matrix switch uses 2n 2.times.2 optical changeover switches in the outer stages and n.sup.2 -2n optical shift switches in the intermediate stages.

Abstract: An optical shift register constructed from at least two optical memory cells connected in cascade, each memory cell having an optical combiner, a 1.times.2 optical switch, a clock, and an optical amplifier, all connected by optical fibers. Each memory cell in the sequence is connected to the next sequential cell by an optical fiber from its output port to the input port of the next sequential cell. The input port of the first optical memory cell serves as the input to the shift register. The output port of the last sequential optical memory cell serves as the output port of the shift register. Each cell is controlled by a clock, all clocks operating at the same rate, but each out of phase with the clock in the next sequential cell. Control signals are provided by said clocks to shift optical pulses from one cell to the next for the enter-shift-exit cycle of the shift register.

Abstract: An optical time slot interchanger which interchanges one optical pulse at a time in a bit interleaved format. The optical time slot interchanger is constructed from an N-bit serial-to-parallel converter and N optical memory cells, each of said optical memory cells being optically coupled to a parallel output port of said optical-to-serial converter. The ouputs of all N optical memory cells are optically coupled to form a single output port for the time slot interchanger. The optical time slot interchanger has a single input port to receive serially a frame of N optical pulses and a single output to present serially said frame of pulses with interchanged time slots. As a frame of N optical pulses enters the optical time slot interchanger, they are shifted and stored in said optical serial-to-parallel converter under the control of clock means. The optical pulses are then shifted to optical memory cells to await serial output in a time slot interchange under control of other clock signals.

Abstract: An array of bistable devices includes a thin cadmium sulfide platelet having a first portion thereof that is substantially pure and the remaining portion thereof is implanted with atoms that can bind excitons. Such remaining portion can be implanted with ions from a lithium source. Apparatus for providing such an array can include a source of lithium ions and masking means for selectively permitting and for selectively inhibiting passage of ions from the source to pass therethrough and to implant in a pattern onto the platelet. The apparatus operates at temperatures in the neighborhood of liquid helium. A method for producing such an array includes providing a thin, substantially pure, platelet of cadmium sulfide, selectively masking the platelet with a pattern to selectively permit and to selectively inhibit passage of ions onto the platelet, and providing a source of ions. The source of ions, in accordance with certain features, can be lithium ions.

Abstract: Method of MOVPE growing a compound semiconductor material, for example GaAs, on a substrate, for example Si. Sodium ions are first introduced onto the substrate surface as by immersing it in a cleaning solution containing sodium. A two-step MOVPE process is then employed to grow device quality single crystal compound semiconductor material on the surface of the substrate.

Abstract: A novel method for reducing the facet reflectivities of semiconductor light sources and amplifiers concerns the use of a bulk (non-waveguiding) index-matched regrown end cap region at both of the major facet surfaces of the amplifier. The amplifier has a tilted stripe geometry which, in combination with the end cap regions, enable the amplifier to reproducibly achieve facet reflectivities of less than 10.sup.-5 while avoiding a facet coating step. The improved optical amplifier is more amenable to mass production and less sensitive to both wavelength and polarization.

Abstract: A beam mode discharge lamp typically has a shortcoming in that emitted light is reduced due to the deposition of cathode material on the phosphor surface. Such deposition can be reduced through the addition of a conductive mesh about the filaments to entrap cathode material and inhibit same from attacking the phosphor material.

Abstract: An n-imput CMOS NOR-gate having n nMOS transistors connected in parallel with their inputs connected to different input terminals and their outputs connected to a common output terminal. First and second sets of n pMOS transistors each are each connected in series between a positive voltage source and the output terminal. The inputs of the first set of pMOS transistors are connected to the input terminals in order, and the inputs of the second set of pMOS transistors are connected to the input terminals in the reverse order.

Abstract: A content-addressable memory (CAM) consisting of an array of memory cells arranged in a matrix by rows and columns is disclosed in which each memory cell includes a pair of cross-coupled CMOS inverters for storing a representation of a single bit. The bits in each row of memory cells constitute a keyword. Keywords are entered into the memory one row at a time. All of the stored keywords are compared to a single search word simultaneously during a match operation. The CAM is prepared for a match operation by placing a charge on a match line associated with each row. If all the bits of the search word match the bits of the stored keyword, the associated match line remains charged producing a match signal for the row of memory cells. If any bit of the search word does not match the corresponding bit of the stored keyword, the associated match line is discharged producing a no-match signal for the row of memory cells.

Abstract: A method of evaluating the quality of speech in a voice communication system is used in a speech processor. A digital file of undistorted speech representative of a speech standard for a voice communication system is recorded. A sample file of possibly distorted speech carried by said voice communication system is also recorded. The file of standard speech and the file of possibly distorted speech are passed through a set of critical band filters to provide power spectra which include distorted-standard speech pairs. A variance-covariance matrix is calculated from said pairs, and a Mahalanobis D.sup.2 calculation is performed on said matrix, yielding D.sup.2 data which represents an estimation of the quality of speech in the sample file.

Abstract: A system for transmitting digital signals over a transmission line including a driver of an inverter employing CMOS FET's and a termination of an inverter employing CMOS FET's. A sense/control circuit at the termination senses changes in the operating condition of the driver inverter and in response thereto controls the operating condition of the termination inverter. Under steady state conditions the termination inverter establishes the appropriate voltage at an output connection coupled thereto without dissipating any power.

Abstract: Grooves are formed in a single crystal silicon wafer in a pattern to encircle surface areas. Silicon dioxide is placed in the grooves and on the surface and then removed from certain of the areas. Layers of silicon are epitaxially grown only on these areas and their surfaces are oxidized. Polycrystalline silicon is deposited to a thickness greater than that of the epitaxial layers. Both sides of the wafer are ground and polished to produce flat, planar, opposite surfaces; one surface exposing surface areas of the epitaxial layers, the other surface exposing the silicon dioxide in the grooves. The resulting substrate has two types of silicon sections, each of which is electrically isolated from the other by silicon dioxide partitions. One type of section is of silicon of the original wafer, has a surface area in only one surface, and is suitable for the fabrication of low voltage, low power devices therein.

Abstract: An n-input CMOS NAND-gate having n pMOS transistors connected in parallel with their inputs connected to different input terminals and their outputs connected to a common output terminal. First and second sets of n nMOS transistors are each connected in series between the output terminal and ground. The inputs of the first set of nMOS transistors are connected to the input terminals in order, and the inputs of the second set of nMOS transistors are connected to the input terminals in the reverse order.

Abstract: Electrical signals with frequencies ranging from several tens of megahertz to hundreds of gigahertz are generated by detecting the optical output from a novel double-external-cavity diode laser system. The system provides a convenient means of measuring the frequency response of high speed photodetectors, and it can also be used for the optical generation and transmission of microwave or millimeter wave carriers in applications such as phased array radars.

Abstract: A monolithic external-coupled-diode laser structure uses high reflectivity facet coatings to reduce the operating current and to improve suppression of unwanted longitudinal modes.

Abstract: An NpR variable bandwidth control system comprises a class of systems specifically designed to control the access to a T1 link by traffic types that require different fractions of the transmission facilities simultaneoulsy. These systems can be incorporated into the software that is used to control DSC based T1 networks for special services. Essentially, wideband messages such as video signals are transmitted one at a time, whereas low bit rate data signals such as voice are transmitted in parallel. Such a form of transmission makes economical sense in the transmitting of such signals. A proportion p is applied to one of the group so that all data is equitably handled.