Abstract: A sequentially laminated printed circuit board having highly reliable vias can be fabricated by pattern plating flanges or via lands on a copper foil, laminating the foil to a prepreg so that the flanges are embedded into the surface of the prepreg, creating via holes in the laminate that are substantially concentric with the individual flanges, plating the via holes with copper, chemically or mechanically milling off a portion of the copper plating and optionally some of the copper foil to reduce the overall thickness of the laminate, and laminating a second and optionally a third prepreg to the laminate. The resulting printed circuit board has the flanges embedded in the surface of the laminate so that the inside wall of the flange is electrically and mechanically attached to the outside wall of the plated through hole barrel.
Abstract: A process for reforming a plastic packaged integrated circuit die (100) includes grinding away (305) a bottom side (210) of a plastic package (205) and portions of a set of leads (110) that are in the plane of the grinding until a bottom surface (240) of an inner portion (230) of the set of leads is exposed at a peripheral region (235) of the inner portion, cutting (310) approximately perpendicularly to the top and bottom sides to remove portions of the plastic package and the set of leads that are outside the inner portion of the set of leads, and adapting (320) the bottom surfaces of the inner portion of the set of leads for reliable electrical connections.
Type:
Grant
Filed:
June 5, 2006
Date of Patent:
October 14, 2008
Assignee:
Motorola, Inc.
Inventors:
Timothy B. Dean, Bruce C. Deemer, Daniel T. Rooney
Abstract: A method for forming closed vias in a multilayer printed circuit board. A dielectric layer is laminated to one side of a central core having a metal layer on each side. A second dielectric layer is laminated to the other side of the central core. Closed vias in the central core have been formed by drilling partially through but not completely penetrating the central core, and then completing the via from the opposite side with a hole that is much smaller in diameter to form a pathway that penetrates completely through the central core from one side to another. The via is then plated with metal to substantially close the smaller hole. Approximately one half of the closed vias are situated such that the closed aperture faces one dielectric layer and a remainder of the closed vias are situated such that the closed aperture faces the other dielectric layer.
Type:
Grant
Filed:
November 8, 2006
Date of Patent:
September 23, 2008
Assignee:
Motorla, Inc.
Inventors:
Jaroslaw A. Magera, Gregory J. Dunn, Kathy D. Leganski
Abstract: An apparatus is disclosed for a communication device (100) with a wideband antenna (102) supporting at least two common and one differential resonant modes. An apparatus that incorporates teachings of the present invention may include, for example, the communication device having an antenna (102) that includes a ground structure (202), a first elongated conductor (204) spaced from the ground structure, a second elongated conductor (206) separated from the first elongated conductor, third and fourth conductors (212) each coupled to the first and second elongated conductors forming a gap (205), a ground conductor (208) coupling the ground structure to one among the first and second elongated conductors, and a signal feed conductor (210) coupling to one among the first and second elongated conductors spaced from the ground conductor. Additional embodiments are disclosed. A ?10 dB bandwidth of at least 0.5 can be realized using electrical non-congruence.
Type:
Grant
Filed:
December 6, 2006
Date of Patent:
September 9, 2008
Assignee:
Motorola, Inc.
Inventors:
Giorgi G. Bit-Babik, Carlo Dinallo, Antonio Faraone