Patents Represented by Attorney James R. Warnot, Jr.
  • Patent number: 5198878
    Abstract: A system for machining and for verifying the machining of substrates includes an energy beam located to impinge upon machined features of the substrates and a photodiode switching circuit matrix for detecting those portions of the energy beam which impinge upon the machined features of the substrate. The photodiode switching circuits include a current boost resistor in parallel with the photodiode which allows greater current to flow through the output diode, thereby increasing its switching speed. Pairs of photodiode circuits of the array are sequentially energized so that dual strings of outputs are produced. These outputs are then multiplexed and digitized. The digital outputs are compared in a verifier controller with a predetermined set of data to determine accuracy of the machining process. Substrates to be machined and verified can be mounted on a single X-Y table so that the machining and verification processes can be accomplished simultaneously.
    Type: Grant
    Filed: November 30, 1990
    Date of Patent: March 30, 1993
    Assignee: International Business Machines Corporation
    Inventors: Anthony F. Coneski, Yea-Sen Lin, George B. VanderGheynst
  • Patent number: 5195097
    Abstract: A high speed tester stores the data corresponding to the first and last addresses of each test loop in a high speed cache. In the majority of test addresses, data is transferred from a memory into at least two shift registers and the cache is not accessed. The output of the shift registers are interleaved in a multiplexer to provide two bits of test data for each tester clock cycle. Control circuitry decodes bits associated with each data address and controls presenting data to the shift registers from the memory and the cache. Use of the cache allows a continuous output of test data from the multiplexer during repetitions of a loop and when new test loop are introduced, with no intervals in the data, regardless of whether the data terminates on an address boundary.
    Type: Grant
    Filed: October 19, 1990
    Date of Patent: March 16, 1993
    Assignee: International Business Machines Corporation
    Inventors: Richard Bogholtz, Jr., Louis J. Bosch, Thomas H. Mitchell, Jr.
  • Patent number: 5159409
    Abstract: A system for machining and for verifying the machining of substrates includes an energy beam located to impinge upon machined features of the substrates and a photodiode switching circuit matrix for detecting those portions of the energy beam which impinge upon the machined features of the substrate. The photodiode switching circuits include a current boost resistor in parallel with the photodiode which allows greater current to flow through the output diode, thereby increasing its switching speed. Pairs of photodiode circuits of the array are sequentially energized so that dual strings of outputs are produced. These outputs are then multiplexed and digitized. The digital outputs are compared in a verifier controller with a predetermined set of data to determine accuracy of the machining process. Substrates to be machined and verified can be mounted on a single X-Y table so that the machining and verification processes can be accomplished simultaneously.
    Type: Grant
    Filed: October 9, 1991
    Date of Patent: October 27, 1992
    Assignee: International Business Machines Corporation
    Inventors: Anthony F. Coneski, Yea-Sen Lin, George B. Vander Gheynst
  • Patent number: 5001423
    Abstract: A wafer chuck temperature control system is disclosed for use in a semiconductor wafer testing apparatus. The wafer chuck is divided into a plurality of temperature sensor and cooling element domains corresponding to chip location regions of an overlying undiced wafer being tested. Computer scanning of the sensors determines which domain is the one harboring the heat source (chip under test) and selects the same for connection to a closed loop temperature control feedback servo. Provision also is made for introducing a helium gas interface between the wafer and the chuck by placing annular grooves in the face of the chuck through which the helium flows when the wafer is vacuum-seated against the chuck. A predetermined helium gas flow rate is maintained to preserve vacuum holddown and to optimize the thermal resistance of the wafer-chuck interface.
    Type: Grant
    Filed: January 24, 1990
    Date of Patent: March 19, 1991
    Assignee: International Business Machines Corporation
    Inventors: Anthony J. Abrami, Stuart H. Bullard, Santiago E. del Puerto, Paul M. Gaschke, Mark R. LaForce, Paul J. Roggemann, Kort F. Longenbach
  • Patent number: 5000652
    Abstract: A wafer transfer apparatus used in manufacturing high density semiconductor products is disclosed which includes at least three movable arms for supporting a wafer from below thereby preventing contact with the active surface of the wafer. A mechanism for moving the arms into and out of its wafer supporting position is diposed, in part, above the wafer when a wafer is supported thereby. The portions of the actuator mechanism disposed above the wafer are constructed in a way such that no sliding contact occurs between elements thereof. Sliding contact between elements disposed above a wafer has proved to produce microscopic particles which can fall onto the active surface of the wafer thereby contaminating the circuits contained thereon. As sliding contact is avoided by the apparatus of the present invention, contamination particles produced within the wafer transfer apparatus is substantially reduced, if not entirely eliminated.
    Type: Grant
    Filed: October 13, 1989
    Date of Patent: March 19, 1991
    Assignee: International Business Machines Corporation
    Inventors: Richard G. Christensen, Alfred Mack
  • Patent number: 4998108
    Abstract: A digital-to-analog converter system includes a logic system which receives input signals, receives an increment/decrement signal, and provides a digital word composed of most significant bits and least significant bits. The system includes two DACs haaving separate data rates and ranges for converting the most significant bits and the least significant bits, respectively, the data rate of the second DAC being greater than the data rate of the first DAC. Combining circuitry produces an analog signal representative of the digital word from the first and second analog outputs. The data rate of the combined output may be as fast as the data rate of the second DAC, and the range of the combined output may be as large as the range of the first DAC. The system also includes track and hold circuitry which holds the value of the output of the first DAC until glitches are settled.
    Type: Grant
    Filed: July 30, 1990
    Date of Patent: March 5, 1991
    Assignee: International Business Machines Corporation
    Inventors: James M. Ginthner, Cecil T. Ho