Patents Represented by Attorney James W. Brady
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Patent number: 5696002Abstract: This is a system and method of forming an electrical contact to the optical coating of an infrared detector. The method may comprise: forming thermal isolation trenches 22 in a substrate 20; depositing a trench filler 24 in the thermal isolation trenches 22; depositing a common electrode layer 31 over the thermal isolation trenches 22; depositing an optical coating 26 above the common electrode layer 31; mechanically thinning the substrate to expose the trench filler 24; etching to remove the trench filler 24 in the bias contact area; depositing a contact metal 34 on the backside of the substrate 20, wherein the contact metal 34 connects to the common electrode layer 31 at bias contact areas 34 around a periphery of the thermal isolation trenches; and etching the contact metal 34 and the trench filler 24 to form pixel mesas of the contact metal 34 and the substrate 20. Bias contact vias 23 may be formed in the bias contact areas and then filled with bias contact metal 49.Type: GrantFiled: April 19, 1996Date of Patent: December 9, 1997Assignee: Texas Instruments IncorporatedInventors: Steven N. Frank, James F. Belcher, Charles E. Stanford, Robert A. Owen, Robert J. S. Kyle
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Patent number: 5641713Abstract: A process for manufacturing hermetically cold weld sealed package and method for sealing where a metal seal member 28 is placed along the edge of a base 36, an organic sealant 26 is placed along the outside of the base adjacent the metal seal member 28, and a lid 30 is placed over the base 36 to create a hermetically sealed cavity 46. The process takes place at room temperature environment in an inert environment, and no heating of the metal sealing member 28 is required. The shrinkage of the organic sealant 26 during curing applies pressure to the metal seal member 28, enhancing the effectiveness of the hermetic seal.Type: GrantFiled: March 23, 1995Date of Patent: June 24, 1997Assignee: Texas Instruments IncorporatedInventor: Robert Joseph Stephen Kyle
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Patent number: 5638599Abstract: Thermal isolation mesas 36 comprising a porous material 64 are used to thermally insulate sensing integrated circuitry 44 from pixels 34 of an uncooled IR detector hybrid system 30. The porous material 64 is preferably a silicon-dioxide xerogel. The mesas 36 may also comprise a protective film 66.Type: GrantFiled: March 29, 1995Date of Patent: June 17, 1997Assignee: Texas Instruments IncorporatedInventors: Howard R. Beratan, Chih-Chen Cho, Scott R. Summerfelt
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Patent number: 5627082Abstract: A porous film 64 is used to thermally insulate sensing integrated circuitry 44 from pixels 34 of an uncooled IR detector hybrid system 30. The porous film 64 is preferably a silicon-dioxide xerogel. A protective film 65 may be deposited on the porous film 64.Type: GrantFiled: March 29, 1995Date of Patent: May 6, 1997Assignee: Texas Instruments IncorporatedInventors: Howard R. Beratan, Chih-Chen Cho
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Patent number: 5625232Abstract: A semiconductor device (and method of manufacturing thereof) having metal leads (114+130) with improved reliability, comprising metal leads (114+130) on a substrate 112, a low-dielectric constant material (116) at least between the metal leads (114+130), and dummy vias (122+134) in contact with the metal leads (114+130). Heat from the metal leads (114+130) is transferable to the dummy vias (122+134), and the dummy vias (122+134) are capable of conducting away the heat. The low-dielectric constant material (116) may have a dielectric constant of less than about 3.5. An advantage of the invention is to improve reliability of metal leads in circuits using low-dielectric constant materials, especially in scaled-down circuits that are compact in the horizontal direction.Type: GrantFiled: July 15, 1994Date of Patent: April 29, 1997Assignee: Texas Instruments IncorporatedInventors: Ken Numata, Kay L. Houston
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Patent number: 5607600Abstract: An infrared sensing array 46 is coupled to a sensing integrated circuit structure 48, and then inter-pixel thermal isolation slots 62 are etched in the optical coating 32 of the infrared sensing array 46. An optional protective material 64 may be deposited over at least the sensing integrated circuit structure 48 for additional protection.Type: GrantFiled: January 31, 1995Date of Patent: March 4, 1997Assignee: Texas Instruments IncorporatedInventors: James F. Belcher, Craig Osborn
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Patent number: 5554873Abstract: A semiconductor device having a p type polysilicon resistor (56) with a moderate sheet resistance and low temperature coefficient of resistance is formed by a double-level polysilicon process. The process also produces n and p-channel transistors (44, 50), a capacitor having upper and lower n type polysilicon capacitor plates (36, 26), an n type polysilicon resistor (32) having a high sheet resistance, and an n type resistor (34) having a low sheet resistance. The p type doping used to form the source/drain regions (48) of p-channel transistor (50) counterdopes n type second level polysilicon to form p type polysilicon resistor (56) without effecting capacitor plates (36, 26) or the n type resistors (32, 34).Type: GrantFiled: June 7, 1995Date of Patent: September 10, 1996Assignee: Texas Instruments IncorporatedInventors: John P. Erdeljac, Louis N. Hutter
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Patent number: 5553168Abstract: A method and apparatus for reading visual indicia is disclosed. The method involves capturing the visual indicia as a digital image, isolating the visual indicia on the digital image, converting the visual indicia to image primitives, identifying the identified visual indicia, and presenting the visual indicia. The apparatus contains a camera for capturing a visual image, a video-to-digital converter, and a computing means.Type: GrantFiled: January 21, 1994Date of Patent: September 3, 1996Assignee: Texas Instruments IncorporatedInventors: A. Kathleen Hennessey, YouLing Lin, Howard V. Hastings, II, Jerome R. Lovelace, Ning S. Chang
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Method of making reliable metal leads in high speed LSI semiconductors using thermoconductive layers
Patent number: 5510293Abstract: A method for manufacturing semiconductor device having metal leads 14 with improved reliability, and device for same, including metal leads 14 on a substrate 12, a low-dielectric constant material 18 at least between the metal leads 14, and thermoconductive insulating layer 22 deposited on the metal leads 14 and the low-dielectric constant material 18. Heat from the metal leads 14 is transferable to the thermoconductive insulating layer 22, and the thermoconductive insulating layer 22 is capable of dissipating the heat. The low-dielectric constant material 18 has a dielectric constant of less than 3.5. An advantage of the invention is to improve reliability of metal leads for circuits using low-dielectric constant materials.Type: GrantFiled: May 31, 1994Date of Patent: April 23, 1996Assignee: Texas Instruments IncorporatedInventor: Ken Numata -
Patent number: 5489550Abstract: A germanium-containing compound may be used as an additive to dopant source gas to improve the direct GPD (Gas-Phase Doping) processes. This invention involves a gas-phase doping method for semiconductor wafers, including the steps of providing a semiconductor wafer, and exposing the surface of the wafer to a process medium comprising a dopant gas in order to dope the surface of the wafer, wherein the process medium also comprises a germanium-containing compound gas. Preferably, the process medium also comprises a carrier gas, where the carrier gas is hydrogen. The germanium-containing gas can be germane, digermane, or other suitable germanium-containing compound. The wafer and dopant gas may also be exposed to a plasma source, and the wafer may be heated in a rapid thermal processing reactor. Some advantages over conventional GPD processes include faster desorption of byproducts and incorporation of dopant atoms, shallower junctions, shorter cycle times, and lower processing temperatures.Type: GrantFiled: August 9, 1994Date of Patent: February 6, 1996Assignee: Texas Instruments IncorporatedInventor: Mehrdad M. Moslehi
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Patent number: 5460693Abstract: An all-dry microlithography process, where a fluorinated layer 30 is deposited on a processable layer 18 of a semiconductor wafer, and regions of the fluorinated layer 30 are exposed to a masked radiation source so that exposed regions and unexposed areas 31 are formed in the fluorinated layer 30. An oxide layer is grown on the fluorinated layer, forming thicker region 34 of oxide on the unexposed areas 31 of the fluorinated layer 30, and forming thinner regions 32 of oxide on the exposed regions of the fluorinated layer 30. The oxide layer is then etched, removing thinner regions 32 of the oxide layer but leaving at least a fraction of the thicker portions 34 of the oxide layer to be used as a patterned hard mask. Then the exposed fluorinated layer not covered by the patterned oxide hard mask, is etched, to expose areas of the processable layer 18 not covered by the oxide hard mask, for subsequent patterned processing.Type: GrantFiled: May 31, 1994Date of Patent: October 24, 1995Assignee: Texas Instruments IncorporatedInventor: Medrdad M. Moslehi
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Patent number: 4697019Abstract: A compound of formula (XXII): ##STR1## or a compound of formula (XXIII): ##STR2## wherein in formula (XXIII), j.sup.1 -1 is 1 to 4; and Q.sub.6 and Q.sub.7 are on the same carbon atom; and wherein, in formulae (XXII) and (XXIII), Q.sub.6 is NH.sub.2 and Q.sub.7 is H, and either p is 0 to 2 and q is 1; or p is 1 and q is 0 to 3; and one of R.sub.5 and R.sub.6 is hydrogen, C.sub.1-6 alkyl, phenyl or phenyl --C.sub.1-3 alkyl, which phenyl moieties may be substituted by C.sub.1-6 alkyl, C.sub.1-6 alkoxy, CF.sub.3 or halogen; and the other of R.sub.5 and R.sub.6 is hydrogen or C.sub.1-6 alkyl.Type: GrantFiled: March 21, 1986Date of Patent: September 29, 1987Assignee: Beecham Group p.l.c.Inventor: Francis D. King