Abstract: A speculative store forwarding apparatus in a pipelined microprocessor that supports paged virtual memory is disclosed. The apparatus includes comparators that compare only the physical page index of load data with the physical page indexes of store data pending in store buffers to detect a potential storehit. If the indexes match, forwarding logic speculatively forwards the newest storehit data based on the index compare. The index compare is performed in parallel with a TLB lookup of the virtual page number of the load data, which produces a load physical page address. The load physical page address is compared with the store data physical page addresses to verify that the speculatively forwarded storehit data is in the same page as the load data. If the physical page addresses mismatch, the apparatus stalls the pipeline in order to correct the erroneous speculative forward. The microprocessor stalls until the correct data is fetched.

Abstract: A disk drive array with a controller which provides: dynamic remapping for grown defects in the disk drives, multi-thread request processing with a variable number of forkings, defect tracking with both logical and physical lists, guarded writes of less than a full stripe optimized by selectably using the redundancy to limit the number of sectors involved, association of multiple operations with a single disk request in order to facilitate error handling, use of an access hiatus as indication of further opportunity to rebuild data in background, and scatter/scatter (bidirectional scatter/gather) operations.

Abstract: A disk controller which fragments host requests into atomic requests or one cycle operations prior to execution. The disk controller is coupled to a disk array and receives requests from a host CPU. Host requests are fragmented down to atomic operations. This is highly advantageous for error handling because the controller is not required to determine which phase of an operation is being requested, since every operation is single phase. The present invention includes use of fence markers or execution-control markers to "fence" of mark a block of tasks and ensure that the atomic operations are executed in sequence, if necessary. These markers ensure that related sequences of atomic operations are kept together without, for example, possibly disruptive intervening writes.