Patents Represented by Attorney Janah & Associatees, P.C.

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  • Fabrication of through-silicon vias on silicon wafers
    Patent number: 8329575
    Abstract: A through-silicon via fabrication method includes etching a plurality of through holes in a silicon plate. An oxide liner is deposited on the surface of the silicon plate and on the sidewalls and bottom wall of the through holes. A metallic conductor is then deposited in the through holes. In another version, which may be used concurrently with the oxide liner, a silicon nitride passivation layer is deposited on the exposed back surface of the silicon plate of the substrate.
    Type: Grant
    Filed: December 22, 2010
    Date of Patent: December 11, 2012
    Assignee: Applied Materials, Inc.
    Inventors: Nagarajan Rajagopalan, Ji Ae Park, Ryan Yamase, Shamik Patel, Thomas Nowak, Li-Qun Xia, Bok Hoen Kim, Ran Ding, Jim Baldino, Mehul Naik, Sesh Ramaswami