Abstract: A mechanism is provided that transforms a class hierarchy of an object-oriented program to a new class hierarchy based upon a set of rules. The new class hierarchy is constructed by transforming a class hierarchy based upon a set of transformation rules which perform one of the following operations: i) merging of two classes; ii) removing a virtual inheritance relation; and iii) replacing a virtual inheritance relation with a non-virtual inheritance relation. The transformation is preferably generated on either a specialized class hierarchy or a class hierarchy obtained by class hierarchy slicing. Thus, the new class hierarchy is a simplification of the inheritance structure, which may result in a reduction in the number of compiler-generated fields in objects, and hence in a reduction of object size of the program.

Abstract: The method of the present invention discovers patterns in an sequence of characters in two phases. In a sampling phase, preferably proper templates corresponding to the sequence of characters are generated. Patterns are then generated corresponding to the templates and stored in memory. In a convolution phase, the patterns stored in memory are combined to identify a set of maximal patterns. A subset of the maximal patterns is selected. Compressed data representing the sequence of characters is generated. The compressed data includes first data data representing each selected pattern of the subset, and second data representing the sequence of characters wherein occurrences of each selected pattern within the sequence of characters is replaced by a reference to first data corresponding to the selected pattern. The method is useful in compressing information stored in a database or compressing information communicated over a communication link.

Abstract: Polysilicon thin film transistors (TFTs) are formed on glass substrates by selectively etching a dielectric layer to expose portions of an amorphous silicon layer in areas of the substrate occupied by the thin film transistor forming a metal seed layer over the exposed portions of the amorphous silicon layer; and selectively annealing the exposed areas with a laser beam to transform the amorphous silicon layer to a polysilicon layer.

Abstract: The present invention is an apparatus that maps the memory address space of the computer system into regions, and detects the incorrect execution of a load operation performed earlier than a sequentially preceding (in program order) store operation. The apparatus detects out-of-order load operations, uses a region-based mapping table to keep track of the memory regions accessed by the out-of-order load operations, detects the execution of store operations into regions accessed by out-of-order load operations, and generates a program exception when interference among reordered operations is detected. The invention is applicable to static and dynamic reordering of memory operations.

Abstract: A multi-layer metal sandwich structure with taper and reduced etch bias formed on a substrate includes a first metal layer formed on the substrate and a second metal layer formed on the first metal layer. The width of the first metal layer is greater than the width of the second metal layer at the interface of the first metal layer and the second metal layer. The second metal layer has tapered side walls. The taper angle between each side wall and the intersection of the first and second metal layers is between 5.degree. and 90.degree.. The multi-layer metal sandwich may also include a third metal layer formed on the second metal layer.

Abstract: A zoom control mechanism includes a context display for displaying a representation of a data set, a zoom display for displaying a representation of a zoom interval within the data set, a context indicator that indicates a start point or an end point of a zoom interval within a context display, and a zoom indicator, corresponding to the context indicator, that indicates the start point or end point of the zoom interval within the zoom display. The zoom interval is updated according to user selection and movement of the context indicator and the zoom indicator to a new location within the context display and the zoom display, respectively.

Abstract: A gate dielectric layer comprising a carbon film aligned to, and continuously covering, the gate electrode. The carbon dielectric film adheres to a wide variety of gate metals and is readily etched using etch processes which do not etch into the gate metal. In a preferred embodiment, the self-aligned carbon gate dielectric is deposited by plasma deposition, followed by deposition of a redundant gate dielectric.

Abstract: A view of a three dimensional scene is generated by organizing the view into successive co-centric subsets. For each subset of the view, image data for the subset is generated by rendering the primitives that form the three dimensional scene, whereby the resolution of the image data representing the subsets is varied amongst the subsets. The non-uniform resolution image data representing the subsets of the view is stored in memory. The non-uniform resolution image data is expanded to construct pixel data that represents a non-uniform resolution view of the three dimensional scene. The rendering operation is parallelized by performing a rasterization operation concurrent with a scaling and clipping operation. The rasterization operation rasterizes data defining a given primitive to generate image data that represents contribution of the given primitive to a particular subset of the view. The scaling operation scales data defining the given primitive.

Abstract: A priority queue is used to sequence template instantiations in compiling C++ programs. If the analysis of a C++ code fragment encounters a name that requires full instantiation and no matching full instantiation exists, the parse is terminated and rescheduled, and a full instantiation is scheduled as an antecedent of the failed parse. "Antecedent" means that the failed parse code fragment will not be reparsed until after the full instantiation has succeeded. Only when the full instantiation has succeeded will the terminated parse be reconsidered. Parsing full instantiations may cause additional full instantiations. These are handled in the same manner; the additional instantiation is scheduled, and the current parse is failed and rescheduled. At the time of scheduling, the antecedent instantiation is marked with its dependent, so that the dependent chain give the chronology of the instantiation. This makes it easy to generate historical or "traceback" information for meaningful error messages.

Abstract: In computer graphics systems, a view of scene of primitives is represented by pixel data associated with a set S of pixels. The present invention identifies whether a given primitive is visible at the set S of pixels by storing in a buffer, for each pixel P belonging to set S, a depth value Z.sub.old associated with the pixel P. The depth value Z.sub.old is partitioned into a plurality of portions including a most significant portion and at least one less significant portion. The buffer comprises a plurality of contiguous blocks each storing corresponding portions of the depth value Z.sub.old for a given set SP of consecutive pixels belonging to set S. A set SQ of consecutive pixels belonging to set S that cover the given primitive is determined. The most significant portion of the depth value Z.sub.old of the set SQ of consecutive pixels are fetched from the buffer. For each pixel Q belonging to set SQ, the most significant portion of the depth value Z.sub.

Abstract: A structural principle is described for control of the gap and the area around the periphery of a liquid crystal display by the formation of an insulating layer out of which, gap dimension maintaining posts and contaminant diffusion inhibiting segmented walls, remain after the display area is etched back out of the layer.

Abstract: A robust means of watermarking a digitized image with a highly random sequence of pixel brightness multipliers is presented. The random sequence is formed from `robust-watermarking-parameters` selected and known only by the marker and/or the marking entity. A watermarking plane is generated which has an element array with one-to-one element correspondence to the pixels of the digitized image being marked. Each element of the watermarking plane is assigned a random value dependent upon a robust random sequence and a specified brightness modulation strength. The so generated watermarking plane is imparted onto the digitized image by multiplying the brightness value or values of each pixel by its corresponding element value in the watermarking plane. The resulting modified brightness values impart the random and relatively invisible watermark onto the digitized image. Brightness alteration is the essence of watermark imparting.

Abstract: The history table of the present invention is utilized to record a context oriented predictor associated with one or more branch instructions. The context oriented predictor preferably is derived from the history table by incorporating within each entry of the history table a vector of branch predictors. This vector comprises for each value of n (where n can be arbitrarily set, yet preferably remains fixed within a given implementation), a set of 2 predictors. When the prefetching action of a processor causes the history table to be accessed, the vector of predictors for a given branch, called the ancestor branch, is retrieved from the history table and stored. After n such retrievals, the action history of the last n branches is used to access a predictor from the vector of predictors that was associated with the n-th ancestor (or predecessor) of the next upcoming branch. This predictor is used to predict the n-th successor branch of the ancestor branch.

Abstract: In a graphics processing and display system wherein the view point is controlled according to position and orientation of a view point reference with respect to a representation of the displayed graphics data determined by a view point reference coordinate sensing system comprising a source and a sensor, wherein the sensor has a fixed position and orientation with respect to said view point reference and the source has a fixed position and orientation with respect to the schematic representation, calibration of the system requires two ordered steps: view point reference-sensor calibration and source-representation calibration. View point reference-sensor calibration is performed by registering and processing four configurations of the sensor housing. Source-representation calibration is performed by storing and processing three positions of the sensor housing.

Abstract: A operand prefetching mechanism is described for a system having a cache, in addition to its normal memory. The prefetch apparatus utilizes a table that records the location of each instruction that caused an operand miss and the location of the miss. Associated with this information is the address of each instruction fetch block that contains an instruction that caused an operand miss. The table is called an Operand Prefetch Table. With each instruction block fetched from the cache a search is made of the Operand Prefetch table to determine if the instructions found in this block previously caused operand misses. If the instruction block fetched matches an entry in the Operand Prefetch Table then a prefetch for future operands can be attempted for the instructions contained within the instruction block fetch segment.

Abstract: A zoom control mechanism includes a context display for displaying a representation of a data set, a zoom display for displaying a representation of a zoom interval within the data set, a context indicator that indicates a start point or an end point of a zoom interval within a context display, and a zoom indicator, corresponding to the context indicator, that indicates the start point or end point of the zoom interval within the zoom display. The zoom interval is updated according to user selection and movement of the context indicator or the zoom indicator to a new location within the context display and the zoom display, respectively.

Abstract: An improved cache coherency protocol is set forth that assures that a collection of processors in a multi-cache system configuration do not disagree about the precedence ordering of store operations that can originate from any and all processors within the system. The protocol maintains coherency while allowing lines to be modified by one processor while other processors access a prior unmodified copy of the line. The benefit of such a system is that line modification need not be done only for lines that are exclusive within the cache that is associated with the modifying processor. The manner in which this coherency is achieved is through the use of line status register which maintains the status of every line in the system and a processor modification register which maintains the identity of all processors that have been granted permission to modify a line that is shared with other processors.

Abstract: Graphics systems manipulate data embodying one or more objects for display. The objects are typically represented by a plurality of faces. In order to rasterize an object for display utilizing a plurality of rasterization engines, the present invention partitions at least one face of the object into a plurality of sub-faces according to a first cost function representing cost of rasterizing the face, and assigns the sub-faces to the plurality of rasterization engines for rasterization. The rasterization engines rasterize the sub-faces to generate pixel data representing the object for display. The partitioning of the face of the object into the plurality of sub-faces may be based upon a second cost function representing cost of rasterizing at least one of the sub-faces. Preferably, each of the sub-faces has equal rasterization cost and each of the sub-faces do not overlap one another.

Abstract: A computer-based method and system describes molecules in a most fundamental and compact way using a set of attributes of the molecule derived from data representing the atomic structure and atomic charge of the molecule. The attributes include the shape of the molecule as defined by the moment of inertia of the molecule, the charge distribution of the molecule as defined by a novel representation of molecular quadrupole, and/or attributes that represent the relationship of the shape to the charge distribution of the molecule. A set of these physical attributes are represented by a set of descriptors. The set of descriptors may be used for molecular matching and activity prediction, as well as in 3D-QSAR analysis.

Abstract: A liquid crystal display, and its manufacturing process, are provided in which antistatic measures are taken in the manufacturing process to prevent the occurrence of static failure before the formation during that process of the short ring. On a glass substrate 2, gate lines 46 are formed. The gate lines 46 are disconnected to form a discharge gap 50 with projections 52 and 54 on both sides of the gap 50. The discharge projections 52 and 54 are positioned substantially at the center of the edges of the disconnected portion of the gate lines 46. A gate insulation film 56 is formed on the gate lines 46 and in the discharge gap 50. Two through holes 58 are made in the gate insulation film 56 in the vicinity of the discharge projections 52 and 54 of each gate line 46. A metal wiring layer 48 is formed on the gate insulation film 56 so as to fill in the through holes 58 where the discharge gap is no longer necessary.