Abstract: A system and method for calibration of a commercial semiconductor test system (tester). The system receives a synchronization signal from the tester and detects light emission from a device under test (DUT). The system then compares the timing and characteristics of the light emission to the synchronization signal to obtain a delay timing and signal change caused by intermediate elements of the tester. The delay timing and signal change are used to calibrate the various channels of the tester. Also described are various designs for DUT's to obtained enhanced accuracy of the delay timing. Further, a system and method are described for reconstruction of a test signal and study of the effects of intermediate elements of the tester on the shape of the test signal.