Abstract: A retiming circuit is provided which accurately converts half-width dual rail data with up to one unit interval of jitter with respect to the data clock, into full-width data. The circuit is comprised of D-flip-flops and associated logic elements which capture and hold a data pulse until the captured data pulse can be accurately transferred to the next circuit stage by a positive clock transition.

Abstract: A screen printing device including a work table having a printing position with a holder to retain a substrate in the printing position, a holder for a screen provided with a mask, the mask having referenced portions, a microscope, an adjuster for positioning the table, screen holder and microscope, and further includes a template with reference portions corresponding to the reference portions of the mask, the work table having at least one hole with associated illumination means to simultaneously illuminate the corresponding reference portions of the mask and of the template held in the printing position by the holder in order to be able to adjust, with the help of the adjuster, the relative position of the reference portions of the template and the reference portions of the mask when viewed through the microscope.

Abstract: A telephone line circuit and system for interfacing digital exchange line circuits to a terminal interface of a switching network is disclosed. The system includes controllable active circuit impedance matching means for reducing impedance mismatch between a selected line circuit and the terminal interface. Control means controls both the active circuit impedance matching means for adjusting the effective circuit impedance to a value within a predetermined range, and the conditioning circuit gain pads for selectably adjusting the gain of a transmitted signal. Additionally, control means controls the d.c. line impedance and voltage for adjusting the effective line feed current to the subscriber loop, and provides interfaces for a plurality of line circuits to both a switching network and external processor. Supervision means provides supervision control signals to the control means and thereby permits the telephone line circuit system to provide desired telephone system functions.

Abstract: The switching network includes in one or more planes MN switching means arranged in M rows and N columns, where M and N are even integers, first intermediate switching devices associated with the M rows and second intermediate switching devices associated with the N columns. Each intermediate switching device associated with a given column is coupled to a different one of the M rows and each intermediate switching group of the second intermediate switching device is coupled to a different one of the N columns. Each of the MN switching means has a first plurality of ports coupled to a plurality of digital terminals, a second plurality of ports associated with a different one of the M rows and a third plurality of ports associated with a different one of the N columns.

Abstract: The digital supervisory circuit comprises an amplitude comparator and EXCLUSIVE-OR gate to provide an output signal indicating the difference in time an input signal is above and below a predetermined reference potential. This output signal is integrated in an up-down binary counter and also is coupled to a first logic circuit under control of the counter which provides a ring present supervisory signal when a first threshold is exceeded and a second logic circuit under control of the counter which provides a switch hook detection supervisory signal when a second threshold is exceeded. A hit-timing circuit is provided coupled to the counter and the first and second logic circuits to prevent response of the counter and second logic circuit to line transients.

Abstract: An operational amplifier is disclosed which is capable of handling input voltages in excess of 200 volts, comprising at least in the input stage thereof a plurality of low voltage transistors including at least a pair of low voltage lateral PNP transistors each having two collectors. These lateral PNP transistors act as level shifters for the amplifier and also a bias arrangement for the input stage. A single high voltage lateral PNP is in the signal path providing the lowest pole in the transfer function and to compensate for low to medium loop gains.

Abstract: Reactor apparatus for use with a gaseous plasma includes a grounded electrode in contact with the plasma. The electrode includes one or more bores in which plasma jets form.

Abstract: A diagnostic system for a telecommunications system including a digital switching network is controlled via a plurality of data processors. Each of the distributed data processors has a unique address and has diagnostic data stored therein for use in performing diagnostics in the switching network. The switching network includes digital switching elements, each having bidirectional ports for receiving and transmitting digital signals, and each of the bidirectional ports also having a unique address in the network. Diagnostic paths are established under processor control between the digital switching elements and the data processors.

Abstract: A printed circuit assembly for a card file packaging system is disclosed that includes a flat flexible dielectric member having printed conductors disposed thereon patterned to form a printed circuit and a single piece rigid molded dielectric member to which the flexible member is secured for support with the molded member having molded therein at least holes to support leads of the electrical components and, hence, the components themselves of the printed circuit and to enable connection of the leads of the electrical components to the printed conductors on the flexible member, slides for tracks of the card file system and electrical connectors to connect the printed circuit assembly to the card file system.

Abstract: A Delta-Sigma .DELTA..SIGMA. modulator for one-bit analog to digital conversion of a signal, such as a telephone voice channel switch to digital form is disclosed. The circuit incorporates integration operative as low-pass filtering. The voice signal is sampled at a rate high compared to the highest voice channel frequency component. Sampled instantaneous signal values are integrated, re-sampled and again integrated to reduce encoding noise. Finally, a bi-level sense identifying circuit links the second integrator output to a D type flip-flop providing the one-bit encoded output.The sampling and integrator control is effected by switching in a capacitor charge shifting arrangement under clock control and feedback is applied as a capacitor switching program modifications.

Abstract: An apparatus and method of organizing line interface modules between analog subscriber lines/trunks and a digital switch with the provision for ringing signals which may be shared by a plurality of lines from a single source is described. The ringing signals are intercoupled to any line or lines and transmitted through a common metallic bus which provides immediate ringing for any line, with a shared ring-trip circuit. A software-controlled and/or programmable signal generator in combination with a novel ring-trip circuit is described wherein ringing cadence is generated by connecting the programmable signal generator to a subscriber line for the proper duration and at any desired frequency, whereby multi-frequency ringing can be accomplished under programmable control.